| A dual-channel compass/GPS/GLONASS/Galileo reconfigurable GNSS receiver in 65 nm CMOS with on-chip I/Q calibration N Qi, Y Xu, B Chi, X Yu, X Zhang, N Xu, P Chiang, W Rhee, Z Wang IEEE Transactions on Circuits and Systems I: Regular Papers 59 (8), 1720-1732, 2012 | 64 | 2012 |
| A dual-channel GPS/Compass/Galileo/GLONASS reconfigurable GNSS receiver in 65nm CMOS N Qi, Y Xu, B Chi, X Yu, X Zhang, Z Wang 2011 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2011 | 30 | 2011 |
| A 0.6mW 31MHz 4th-order low-pass filter with +29dBm IIP3 using self-coupled source follower based biquads in 0.18µm CMOS Y Xu, S Leuenberger, PK Venkatachala, UK Moon 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 1-2, 2016 | 29 | 2016 |
| A 2.7-mW 1.36–1.86-GHz LC-VCO with a FOM of 202 dBc/Hz enabled by a 26%-size-reduced nano-particle-magnetic-enhanced inductor HL Cai, Y Yang, N Qi, X Chen, H Tian, Z Song, Y Xu, CJ Zhou, J Zhan, ... IEEE Transactions on Microwave Theory and Techniques 62 (5), 1221-1228, 2014 | 26 | 2014 |
| A 73dB SNDR 20MS/s 1.28 mW SAR-TDC using hybrid two-step quantization J Muhlestein, S Leuenberger, H Sun, Y Xu, UK Moon 2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017 | 23 | 2017 |
| A 5-/20-MHz BW Reconfigurable Quadrature Bandpass CTADC With AntiPole-Splitting Opamp and Digital/Calibration Y Xu, Z Zhang, B Chi, N Qi, H Cai, Z Wang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (1), 243-255, 2015 | 23 | 2015 |
| Process invariant biasing of ring amplifiers using deadzone regulation circuit PK Venkatachala, S Leuenberger, A ElShater, C Lee, Y Xu, B Xiao, ... 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 22 | 2018 |
| A 10-b Fourth-Order Quadrature Bandpass Continuous-Time Modulator With 33-MHz Bandwidth for a Dual-Channel GNSS Receiver J Zhang, Y Xu, Z Zhang, Y Sun, Z Wang, B Chi IEEE Transactions on Microwave Theory and Techniques 65 (4), 1303-1314, 2017 | 21 | 2017 |
| A 77-dB-DR 0.65-mW 20-MHz 5th-Order Coupled Source Followers Based Low-Pass Filter Y Xu, H Hu, J Muhlestein, UK Moon IEEE Journal of Solid-State Circuits 55 (10), 2810-2818, 2020 | 20 | 2020 |
| A Flexible Continuous-Time ADC With Programmable Bandwidth Supporting Low-Pass and Complex Bandpass Architectures Y Xu, X Zhang, Z Wang, B Chi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (3), 872-880, 2017 | 18 | 2017 |
| A 0.65mW 20MHz 5th-order low-pass filter with +28.8dBm IIP3 using source follower coupling Y Xu, J Muhlestein, UK Moon 2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017 | 17 | 2017 |
| Dual-mode 10MHz BW 4.8/6.3 mW reconfigurable lowpass/complex bandpass CT ΣΔ modulator with 65.8/74.2 dB DR for a zero/low-IF SDR receiver Y Xu, Z Zhang, B Chi, Q Liu, X Zhang, Z Wang 2014 IEEE Radio Frequency Integrated Circuits Symposium, 313-316, 2014 | 13 | 2014 |
| A 5/20MHz-BW 4.2/8.1 mW CT QBP ΣΔ modulator with digital I/Q calibration for GNSS receivers Z Zhang, Y Xu, N Qi, B Chi 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 393-396, 2013 | 12 | 2013 |
| A Charge-Domain Switched-Gm-C Band-Pass Filter Using Interleaved Semi-Passive Charge-Sharing Technique Y Xu, PK Venkatachala, Y Hu, S Leuenberger, GC Temes, UK Moon IEEE Transactions on Circuits and Systems I: Regular Papers 67 (2), 600-610, 2019 | 11 | 2019 |
| A 0.1–5GHz flexible SDR receiver in 65nm CMOS X Zhang, Y Xu, B Liu, Q Yu, S Han, Q Liu, Z Zhang, Y Gao, Z Wang, B Chi 2014 IEEE Asian solid-state circuits conference (A-SSCC), 249-252, 2014 | 9 | 2014 |
| A 0.1–5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS X Zhang, Z Chen, Y Gao, Y Xu, B Liu, Q Yu, Y Sun, Z Wang, B Chi Microelectronics journal 72, 58-73, 2018 | 8 | 2018 |
| Voltage domain correction technique for timing skew errors in time interleaved ADCs PK Venkatachala, A ElShater, Y Xu, M El-Chammas, UK Moon 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 7 | 2017 |
| A 7.5mW 35−70MHz 4th-order semi-passive charge-sharing band-pass filter with programmable bandwidth and 72dB stop-band rejection in 65nm CMOS Y Xu, P Venkatachala, S Leuenberger, UK Moon IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 162−165, 2016 | 7 | 2016 |
| A multi-mode blocker-tolerant GNSS receiver with CT sigma-delta ADC in 65nm CMOS N Qi, Z Song, Z Zhang, Y Xu, B Chi, Z Wang 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 333-336, 2013 | 7 | 2013 |
| A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations N Qi, B Chi, Y Xu, Z Chen, J Xie, Z Song, Z Wang 2013 Proceedings of the ESSCIRC (ESSCIRC), 177-180, 2013 | 7 | 2013 |
Nan QiInstitute of Semiconductors, University of Chinese Academy of SciencesVerified email at mails.tsinghua.edu.cn
