| Efficient sorting architecture for successive-cancellation-list decoding of polar codes BY Kong, H Yoo, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 63 (7), 673-677, 2016 | 49 | 2016 |
| Low-complexity symbol detection for massive MIMO uplink based on Jacobi method BY Kong, IC Park 2016 IEEE 27th Annual International Symposium on Personal, Indoor, and …, 2016 | 37 | 2016 |
| Low-complexity low-latency architecture for matching of data encoded with hard systematic error-correcting codes BY Kong, J Jo, H Jeong, M Hwang, S Cha, B Kim, IC Park IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (7 …, 2013 | 29 | 2013 |
| Real-time SSDLite object detection on FPGA S Kim, S Na, BY Kong, J Choi, IC Park IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (6 …, 2021 | 27 | 2021 |
| Retrain-less weight quantization for multiplier-less convolutional neural networks J Choi, BY Kong, IC Park IEEE Transactions on Circuits and Systems I: Regular Papers 67 (3), 972-982, 2019 | 18 | 2019 |
| FIR Filter Synthesis Based on Interleaved Processing of Coefficient Generation and Multiplier-Block Synthesis BY Kong, IC Park IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 16 | 2012 |
| Improved Sorting Architecture for -Best MIMO Detection BY Kong, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 64 (9), 1042-1046, 2017 | 15 | 2017 |
| A memory-efficient IDMA architecture based on on-the-fly despreading BY Kong, IC Park IEEE Journal of Solid-State Circuits 53 (11), 3327-3337, 2018 | 12 | 2018 |
| Efficient implementation of multiple interleavers in IDMA for 5G BY Kong, IC Park 2018 International SoC Design Conference (ISOCC), 119-120, 2018 | 11 | 2018 |
| Parallel IDMA architecture based on interleaving with replicated subpatterns BY Kong, IC Park ICC 2019-2019 IEEE International Conference on Communications (ICC), 1-6, 2019 | 9 | 2019 |
| A low-latency multi-touch detector based on concurrent processing of redesigned overlap split and connected component analysis BY Kong, J Lee, IC Park IEEE transactions on circuits and systems I: Regular Papers 67 (1), 166-176, 2019 | 8 | 2019 |
| A 1.1μs 1.56Gb/s/mm2 Cost-Efficient Large-List SCL Polar Decoder Using Fully-Reusable LLR Buffers in 28nm CMOS Technology D Kam, BY Kong, Y Lee 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 7 | 2022 |
| Area- and energy-efficient LDPC decoder using mixed-resolution check-node processing S Yun, BY Kong, Y Lee IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 999-1003, 2021 | 7 | 2021 |
| Bitwise early termination of multiuser detection for IDMA systems BY Kong IEEE Communications Letters 25 (9), 2998-3002, 2021 | 6 | 2021 |
| Area-Efficient Error Detection Structure for Linear Feedback Shift Registers H Shin, S Choi, J Park, BY Kong, H Yoo Electronics 9 (1), 195, 2020 | 6 | 2020 |
| Low-latency SCL polar decoder architecture using overlapped pruning operations D Kam, BY Kong, Y Lee IEEE Transactions on Circuits and Systems I: Regular Papers 70 (3), 1417-1427, 2023 | 5 | 2023 |
| Low-latency polar decoder using overlapped SCL processing D Kam, BY Kong, Y Lee ICASSP 2021-2021 IEEE International Conference on Acoustics, Speech and …, 2021 | 5 | 2021 |
| Ultra-low-latency LDPC decoding architecture using reweighted offset min-sum algorithm S Yun, D Kam, J Choe, BY Kong, Y Lee 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 5 | 2020 |
| A 120-mW 0.16-ms-latency connectivity-scalable multiuser detector for interleave division multiple access BY Kong, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 67 (3), 470-474, 2019 | 5 | 2019 |
| Hybrid sorting architecture for low-latency successive cancellation list decoding of polar codes BY Kong, IC Park Journal Of Semiconductor Technology And Science 18 (5), 593-601, 2018 | 5 | 2018 |
In-Cheol ParkProfessor of Electrical Engineering, KAISTVerified email at kaist.edu
