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Weiping Shi
Weiping Shi
Professor of Electrical and Computer Engineering, Texas A&M University
Verified email at ece.tamu.edu - Homepage
Title
Cited by
Cited by
Year
K longest paths per gate (KLPG) test generation for scan-based sequential circuits
W Qiu, J Wang, DMH Walker, D Reddy, X Lu, Z Li, W Shi, H Balachandran
Test Conference, 2004. Proceedings. ITC 2004. International, 223-231, 2004
1522004
A fast hierarchical algorithm for three-dimensional capacitance extraction
W Shi, J Liu, N Kakani, T Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002
1302002
The rectilinear Steiner arborescence problem is NP-complete
W Shi, C Su
SIAM Journal on Computing 35 (3), 729-740, 2005
1152005
Longest-path selection for delay test under process variation
X Lu, Z Li, W Qiu, DMH Walker, W Shi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
1062005
Fast algorithms for slew constrained minimum cost buffering
S Hu, CJ Alpert, J Hu, S Karandikar, Z Li, W Shi, CN Sze
Proceedings of the 43rd annual Design Automation Conference, 308-313, 2006
1002006
A fast hierarchical algorithm for 3-D capacitance extraction
W Shi, J Liu, N Kakani, T Yu
Proceedings of the 35th annual Design Automation Conference, 212-217, 1998
841998
A fast algorithm for optimal buffer insertion
W Shi, Z Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
802005
A circuit level fault model for resistive opens and bridges
Z Li, X Lu, W Qiu, W Shi, DMH Walker
Proceedings. 21st VLSI Test Symposium, 2003., 379-384, 2003
792003
An O(n log2 h) time algorithm for the three-dimensional convex hull problem
H EDELSBRUNNER, W SHI
Siam J. Comput 20 (2), 259-269, 1991
661991
Optimal interconnect diagnosis of wiring networks
W Shi, WK Fuchs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 3 (3), 430-436, 1995
561995
Optimal diagnosis procedures for k-out-of-n structures
MF Chang, W Shi, WK Fuchs
IEEE Transactions on Computers 39 (4), 559-564, 1990
561990
Model order reduction of linear networks with massive ports via frequency-dependent port packing
P Li, W Shi
Proceedings of the 43rd annual Design Automation Conference, 267-272, 2006
532006
An O (nlogn) time algorithm for optimal buffer insertion
W Shi, Z Li
Proceedings of the 40th annual Design Automation Conference, 580-585, 2003
532003
On crossing sets, disjoint sets, and pagenumber
F Shahrokhi, W Shi
Journal of Algorithms 34 (1), 40-53, 2000
512000
A vector-based approach for power supply noise analysis in test compaction
J Wang, Z Yue, X Lu, W Qiu, W Shi, DMH Walker
IEEE International Conference on Test, 2005., 10 pp.-526, 2005
482005
Path based buffer insertion
CN Sze, CJ Alpert, J Hu, W Shi
Proceedings of the 42nd annual Design Automation Conference, 509-514, 2005
462005
Complexity analysis and speedup techniques for optimal buffer insertion with minimum cost
W Shi, Z Li, CJ Alpert
ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE …, 2004
462004
A circuit level fault model for resistive bridges
Z Li, X Lu, W Qiu, W Shi, DMH Walker
ACM transactions on design automation of electronic systems (TODAES) 8 (4 …, 2003
432003
Static compaction of delay tests considering power supply noise
J Wang, W Qiu, S Fancler, DMH Walker, X Lu, Z Yue, W Shi
23rd IEEE VLSI Test Symposium (VTS'05), 235-240, 2005
402005
A fast algorithm for area minimization of slicing floorplans
W Shi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996
401996
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