| Improving high level synthesis optimization opportunity through polyhedral transformations W Zuo, Y Liang, P Li, K Rupnow, D Chen, J Cong Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2013 | 109 | 2013 |
| Machine learning on FPGAs to face the IoT revolution X Zhang, A Ramachandran, C Zhuge, D He, W Zuo, Z Cheng, K Rupnow, ... 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 894-901, 2017 | 79 | 2017 |
| Improving polyhedral code generation for high-level synthesis W Zuo, P Li, D Chen, LN Pouchet, S Zhong, J Cong 2013 International Conference on Hardware/Software Codesign and System …, 2013 | 74 | 2013 |
| Accurate high-level modeling and automated hardware/software co-design for effective SoC design space exploration W Zuo, LN Pouchet, A Ayupov, T Kim, CW Lin, S Shiraishi, D Chen Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 39 | 2017 |
| A polyhedral-based systemc modeling and generation framework for effective low-power design space exploration W Zuo, W Kemmerer, JB Lim, LN Pouchet, A Ayupov, T Kim, K Han, ... 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 357-364, 2015 | 32 | 2015 |
| New advances of high-level synthesis for efficient and reliable hardware design K Campbell, W Zuo, D Chen Integration 58, 189-214, 2017 | 19 | 2017 |
| System-level design solutions: Enabling the IoT explosion L Yang, Y Chen, W Zuo, T Nguyen, S Gurumani, K Rupnow, D Chen 2015 IEEE 11th International Conference on ASIC (ASICON), 1-4, 2015 | 10 | 2015 |
| Dml: Dynamic partial reconfiguration with scalable task scheduling for multi-applications on fpgas A Dhar, E Richter, M Yu, W Zuo, X Wang, NS Kim, D Chen IEEE Transactions on Computers 71 (10), 2577-2591, 2021 | 9 | 2021 |
| Designing high-quality hardware on a development effort budget: A study of the current state of high-level synthesis Z Sun, K Campbell, W Zuo, K Rupnow, S Gurumani, F Doucet, D Chen 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 218-225, 2016 | 9 | 2016 |
| Leveraging dynamic partial reconfiguration with scalable ILP based task scheduling A Dhar, M Yu, W Zuo, X Wang, NS Kim, D Chen 2020 33rd International Conference on VLSI Design and 2020 19th …, 2020 | 7 | 2020 |
| New solutions for system-level and high-level synthesis W Zuo, H Zheng, ST Guruman, K Rupnow, D Chen 2014 International Symposium on Integrated Circuits (ISIC), 71-74, 2014 | 4 | 2014 |
| Parallel code-specific CPU simulation with dynamic phase convergence modeling for HW/SW co-design W Kemmerer, W Zuo, D Chen 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 2 | 2016 |
| New Solutions for Cross-Layer System-Level and High-Level Synthesis W Zuo, S Gurumani, K Rupnow, D Chen Emerging Technology and Architecture for Big-data Analytics, 103-134, 2017 | | 2017 |
