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Lucas Machado
Lucas Machado
Senior R&D Engineer, Real Intent
Verified email at realintent.com
Title
Cited by
Cited by
Year
KL-cut based digital circuit remapping
L Machado, M Martins, V Callegaro, RP Ribas, A Reis
NORCHIP, 2012, 1-4, 2012
222012
Functional composition paradigm and applications
MGA Martins, V Callegaro, L Machado, RP Ribas, AI Reis
International Workshop on Logic and Synthesis (IWLS’2012). Berkeley, CA, 2012
132012
Iterative remapping respecting timing constraints
L Machado, MGA Martins, V Callegaro, RP Ribas, AI Reis
2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 236-241, 2013
102013
Support-reducing functional decomposition for FPGA technology mapping
L Machado, J Cortadella
International Workshop on Logic Synthesis, 79-86, 2018
62018
Voltage noise analysis with ring oscillator clocks
L Machado, AR Perez, J Cortadella
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 1-6, 2017
52017
Boolean decomposition for aig optimization
L Machado, J Cortadella
Proceedings of the on Great Lakes Symposium on VLSI 2017, 143-148, 2017
32017
Increasing the robustness of digital circuits with ring oscillator clocks
L Machado, A Roca Pérez, J Cortadella
2nd International Workshop on Resiliency in Embedded Electronic Systems …, 2017
12017
Logic synthesis for manufacturability considering regularity and lithography printability
L Machado, V Dal Bem, F Moll, S Gómez, RP Ribas, AI Reis
2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 230-235, 2013
12013
KL-Cut Based Remapping
L Machado
UNIVERSIDADE FEDERAL DO RIO GRANDE DO SUL, 2013
2013
Estudo e implementação de lógica adiabática para circuitos integrados com baixo consumo
L Machado
2010
Introducing K-cuts and KL-cuts in Circuit Re-Mapping
L Machado, O Martinello, RP Ribas, A Reis
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