| Logic gates based on neuristors made from two-dimensional materials H Chen, X Xue, C Liu, J Fang, Z Wang, J Wang, DW Zhang, W Hu, P Zhou Nature Electronics 4 (6), 399-404, 2021 | 107 | 2021 |
| A 0.13 µm 8 Mb Logic-Based CuSiO ReRAM With Self-Adaptive Operation for Yield Enhancement and Power Reduction X Xue, W Jian, J Yang, F Xiao, G Chen, S Xu, Y Xie, Y Lin, R Huang, ... IEEE Journal of solid-state circuits 48 (5), 1315-1322, 2013 | 52 | 2013 |
| A 0.13µm 8Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction XY Xue, WX Jian, JG Yang, FJ Xiao, G Chen, XL Xu, YF Xie, YY Lin, ... 2012 Symposium on VLSI Circuits (VLSIC), 42-43, 2012 | 44 | 2012 |
| 24.2 A 14nm-FinFET 1Mb Embedded 1T1R RRAM with a 0.022µm2 Cell Size Using Self-Adaptive Delayed Termination and Multi-Cell Reference J Yang, X Xue, X Xu, Q Wang, H Jiang, J Yu, D Dong, F Zhang, H Lv, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 336-338, 2021 | 32 | 2021 |
| Reliability significant improvement of resistive switching memory by dynamic self-adaptive write method YL Song, Y Meng, XY Xue, FJ Xiao, Y Liu, B Chen, YY Lin, QT Zou, ... 2013 Symposium on VLSI Technology, T102-T103, 2013 | 26 | 2013 |
| A small area and low power true random number generator using write speed variation of oxidebased RRAM for IoT security application J Yang, Y Lin, Y Fu, X Xue, BA Chen 2017 IEEE international symposium on circuits and systems (ISCAS), 1-4, 2017 | 23 | 2017 |
| A logic resistive memory chip for embedded key storage with physical security Y Xie, X Xue, J Yang, Y Lin, Q Zou, R Huang, J Wu IEEE Transactions on Circuits and Systems II: Express Briefs 63 (4), 336-340, 2015 | 23 | 2015 |
| A 3D RRAM using stackable 1TXR memory cell for high density application J Zhang, Y Ding, X Xue, Y Wu, Y Xie, Y Lin 2009 International Conference on Communications, Circuits and Systems, 917-920, 2009 | 18 | 2009 |
| A 28nm 1.5Mb Embedded 1T2R RRAM with 14.8 Mb/mm2 using Sneaking Current Suppression and Compensation Techniques J Yang, X Xue, X Xu, H Lv, F Zhang, X Zeng, MF Chang, M Liu 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 17 | 2020 |
| All-electrical control of compact SOT-MRAM: toward highly efficient and reliable non-volatile in-memory computing H Lin, X Luo, L Liu, D Wang, X Zhao, Z Wang, X Xue, F Zhang, G Xing Micromachines 13 (2), 319, 2022 | 16 | 2022 |
| High-density 3-D stackable crossbar 2D2R nvTCAM with low-power intelligent search for fast packet forwarding in 5G applications K Zhou, X Xue, J Yang, X Xu, H Lv, M Jing, J Li, X Zeng, M Liu IEEE Journal of Solid-State Circuits 56 (3), 988-1000, 2020 | 16 | 2020 |
| A low cost and high reliability true random number generator based on resistive random access memory J Yang, J Xu, B Wang, X Xue, R Huang, Q Zhou, J Wu, Y Lin 2015 IEEE 11th International Conference on ASIC (ASICON), 1-4, 2015 | 15 | 2015 |
| Novel RRAM programming technology for instant-on and high-security FPGAs X Xue, W Jian, Y Xie, Q Dong, R Yuan, Y Lin 2011 9th IEEE International Conference on ASIC, 291-294, 2011 | 15 | 2011 |
| A 28nm 512Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for extremely low bit error rate of cryptographic key X Xue, J Yang, Y Zhang, M Wang, H Lv, X Zeng, M Liu 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 29-32, 2019 | 14 | 2019 |
| Low-power variation-tolerant nonvolatile lookup table design X Xue, J Yang, Y Lin, R Huang, Q Zou, J Wu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (3 …, 2015 | 14 | 2015 |
| A physically unclonable function with BER< 0.35% for secure chip authentication using write speed variation of RRAM J Yang, X Li, T Wang, X Xue, Z Hong, Y Wang, DW Zhang, H Lu 2018 48th European Solid-State Device Research Conference (ESSDERC), 54-57, 2018 | 12 | 2018 |
| A 9Mb HZO-Based Embedded FeRAM with 1012-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier J Yang, Q Luo, X Xue, H Jiang, Q Wu, Z Han, Y Cao, Y Han, C Dou, H Lv, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 1-3, 2023 | 11 | 2023 |
| An energy efficient computing-in-memory accelerator with 1T2R cell and fully analog processing for edge AI applications K Zhou, C Zhao, J Fang, J Jiang, D Chen, Y Huang, M Jing, J Han, H Tian, ... IEEE Transactions on Circuits and Systems II: Express Briefs 68 (8), 2932-2936, 2021 | 11 | 2021 |
| A machine-learning-resistant 3D PUF with 8-layer stacking vertical RRAM and 0.014% bit error rate using in-cell stabilization scheme for IoT security applications J Yang, D Lei, D Chen, J Li, H Jiang, Q Ding, Q Luo, X Xue, H Lv, X Zeng, ... 2020 IEEE International Electron Devices Meeting (IEDM), 28.6. 1-28.6. 4, 2020 | 11 | 2020 |
| A risc-v processor with area-efficient memristor-based in-memory computing for hash algorithm in blockchain applications X Xue, C Wang, W Liu, H Lv, M Wang, X Zeng Micromachines 10 (8), 541, 2019 | 10 | 2019 |
Jianguo YangInstitute of Microelectronics of the Chinese Academy of SciencesVerified email at ime.ac.cn
