| Common counters: Compressed encryption counters for secure GPU memory S Na, S Lee, Y Kim, J Park, J Huh 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 18 | 2021 |
| Tnpu: Supporting trusted execution with tree-less integrity protection for neural processing unit S Lee, J Kim, S Na, J Park, J Huh 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 17 | 2022 |
| GAN-D: Generative adversarial networks for image deconvolution HY Lee, JM Kwak, B Ban, SJ Na, SR Lee, HK Lee 2017 International Conference on Information and Communication Technology …, 2017 | 4 | 2017 |
| Tunable Memory Protection for Secure Neural Processing Units S Lee, S Na, J Kim, J Park, J Huh 2022 IEEE 40th International Conference on Computer Design (ICCD), 105-108, 2022 | 1 | 2022 |
| Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training J Kim, S Na, S Lee, S Lee, J Huh Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023 | | 2023 |
| Apparatus and method for providing secure execution environment for npu J Huh, S Lee, NA Seonjin US Patent App. 17/749,386, 2022 | | 2022 |
| Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management S Na, J Kim, S Lee, J Huh | | |
| HPCA 2021 S Na, S Lee, Y Kim, J Park, J Huh | | |
