| HRM: merging hardware event monitors for improved timing analysis of complex mpsocs S Vilardell, I Serra, R Santalla, E Mezzetti, J Abella, FJ Cazorla IEEE transactions on computer-aided design of integrated circuits and …, 2020 | 6 | 2020 |
| Using Markov’s inequality with power-of-k function for probabilistic wcet estimation S Vilardell, I Serra, E Mezzetti, J Abella, FJ Cazorla, J del Castillo 34th Euromicro conference on real-time systems (ECRTS 2022), 2022 | 5 | 2022 |
| Cleanet: enabling timing validation for complex automotive systems S Vilardell, I Serra, H Tabani, J Abella, JD Castillo, FJ Cazorla Proceedings of the 35th Annual ACM Symposium on Applied Computing, 554-563, 2020 | 4 | 2020 |
| Software timing analysis for complex hardware with survivability and risk analysis S Vilardell, I Serra, J Abella, J Del Castillo, FJ Cazorla 2019 IEEE 37th International Conference on Computer Design (ICCD), 227-236, 2019 | 3 | 2019 |
| MUCH: exploiting pairwise hardware event monitor correlations for improved timing analysis of complex MPSoCs S Vilardell, I Serra, E Mezzetti, J Abella, FJ Cazorla Proceedings of the 36th Annual ACM Symposium on Applied Computing, 511-520, 2021 | 1 | 2021 |
| Modelling and predicting extreme behavior in critical real-time systems with advanced statistics S Vilardell Moreno Universitat Politècnica de Catalunya, 2023 | | 2023 |
Francisco J CazorlaBSC and IIIA-CSICVerified email at bsc.es
