| Scaling equations for the accurate prediction of CMOS device performance from 180 nm to 7 nm A Stillmaker, B Baas Integration 58, 74-81, 2017 | 331 | 2017 |
| KiloCore: A 32-nm 1000-processor computational array B Bohnenstiehl, A Stillmaker, JJ Pimentel, T Andreas, B Liu, AT Tran, ... IEEE Journal of Solid-State Circuits 52 (4), 891-902, 2017 | 126 | 2017 |
| A 5.8 pJ/Op 115 Billion Ops/sec, to 1.78 Trillion Ops/sec 32nm 1000-Processor Array B Bohnenstiehl, A Stillmaker, J Pimentel, T Andreas, B Liu, A Tran, ... Symposium on VLSI Circuits, 2016 | 85 | 2016 |
| Toward more accurate scaling estimates of cmos circuits from 180 nm to 22 nm A Stillmaker, Z Xiao, B Baas VLSI Computation Lab, ECE Department, University of California, Davis, Tech …, 2011 | 59 | 2011 |
| Kilocore: A fine-grained 1,000-processor array for task-parallel applications B Bohnenstiehl, A Stillmaker, J Pimentel, T Andreas, B Liu, A Tran, ... IEEE Micro 37 (2), 63-69, 2017 | 37 | 2017 |
| KiloCore: A 32 nm 1000-processor array. B Bohnenstiehl, A Stillmaker, JJ Pimentel, T Andreas, B Liu, A Tran, ... Hot Chips Symposium, 1-23, 2016 | 28 | 2016 |
| Fine-grained energy-efficient sorting on a many-core processor array A Stillmaker, L Stillmaker, B Baas 2012 IEEE 18th International Conference on Parallel and Distributed Systems …, 2012 | 16 | 2012 |
| Combined guaranteed throughput and best effort network-on-chip GK Chen, MA Anders, H Kaul, RK Krishnamurthy, AT Stillmaker US Patent 9,979,668, 2018 | 10 | 2018 |
| The Design of the KiloCore Chip A Stillmaker, B Bohnenstiehl, B Baas ACM/IEEE Design Automation Conference, 2017 | 10 | 2017 |
| Area Efficient Backprojection Computation with Reduced Floating-Point Word Width for SAR Image Formation JJ Pimentel, A Stillmaker, B Bohnenstiehl, BM Baas Asilomar Conference on Signals, Systems, and Computers, 2015 | 9 | 2015 |
| Design of Energy-Efficient Many-Core MIMD GALS Processor Arrays in the 1000-Processor Era A Stillmaker University of California, Davis, 2015 | 5 | 2015 |
| A configurable H. 265-compatible motion estimation accelerator architecture for realtime 4K video encoding in 65 nm CMOS M Braly, A Stillmaker, B Baas 2017 IEEE Conference on Dependable and Secure Computing, 79-85, 2017 | 4 | 2017 |
| Energy-Efficient Sorting on a Many-Core Platform A Stillmaker, L Stillmaker, B Bohnenstiehl, B Baas Technology and Talent for the 21st Century, 2013 | 3 | 2013 |
| Energy-efficient string search architectures on a fine-grained many-core platform EO Adeagbo, BM Baas, Z Xiao, B Baas, A Stillmaker, L Stillmaker, B Baas, ... Technology and Talent for the 21st Century (TECHCON 2015), 2015 | 2 | 2015 |
| An overview of standard cellbased digital VLSI design Z Yu, T Mohsenin, A Stillmaker, B Baas UC Davis seminar, 2010 | 2 | 2010 |
| Scalable energy-efficient parallel sorting on a fine-grained many-core processor array A Stillmaker, B Bohnenstiehl, L Stillmaker, B Baas Journal of Parallel and Distributed Computing 138, 32-47, 2020 | 1 | 2020 |
| Hardware implementation of hevc inverse transform in 45nm cmos R Calusdian, A Stillmaker 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2020 | 1 | 2020 |
| Corrigendum to “Scaling equations for the accurate prediction of CMOS device performance from 180 nm to 7 nm”[Integr. VLSI J. 58 (2017) 74–81] A Stillmaker, B Baas | 1 | 2019 |
| Efficient and High-Performance Sparse Matrix-Vector Multiplication on a Many-Core Array P Shi, A Stillmaker, B Baas 2022 IEEE 15th International Symposium on Embedded Multicore/Many-core …, 2022 | | 2022 |
| Architecture and 28 nm CMOS Design of a 1886 MBin/sec Context-Adaptive Binary Arithmetic Coder (CABAC) Encoder R Chen, A Stillmaker, B Baas 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration …, 2022 | | 2022 |
Jon J. Pimentel, Ph.D.Senior CPU Design Engineer, NVIDIAVerified email at ucdavis.edu
