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M.N. PRADEEP
M.N. PRADEEP
Assistant Professor of Electronics and Communication Engineering
Verified email at dayanandasagar.edu - Homepage
Title
Cited by
Cited by
Year
FPGA implementation of high speed Vedic multiplier using CSLA for parallel FIR architecture
SA Naaz, MN Pradeep, S Bhairannawar, S Halvi
2014 2nd International Conference on Devices, Circuits and Systems (ICDCS), 1-5, 2014
42014
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