| Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform CT Huang, PC Tseng, LG Chen IEEE Transactions on Signal Processing 52 (4), 1080-1089, 2004 | 306 | 2004 |
| Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method CT Huang, PC Tseng, LG Chen IEEE transactions on circuits and systems for video technology 15 (7), 910-920, 2005 | 157 | 2005 |
| Level C+ data reuse scheme for motion estimation with corresponding coding orders CY Chen, CT Huang, YH Chen, LG Chen Circuits and Systems for Video Technology, IEEE Transactions on 16 (4), 553-558, 2006 | 144 | 2006 |
| Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform CT Huang, PC Tseng, LG Chen IEEE Transactions on signal processing 53 (4), 1575-1586, 2005 | 115 | 2005 |
| Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method CT Huang, PC Tseng, LG Chen Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on 5, V …, 2002 | 91 | 2002 |
| Advances in hardware architectures for image and video coding-a survey P Tseng, Y Chang, Y Huang, H Fang, C Huang, L Chen Proceedings of the IEEE 93 (1), 184-197, 2005 | 87 | 2005 |
| A 249-Mpixel/s HEVC video-decoder chip for 4K ultra-HD applications M Tikekar, CT Huang, C Juvekar, V Sze, AP Chandrakasan IEEE Journal of Solid-State Circuits 49 (1), 61-72, 2014 | 82 | 2014 |
| Empirical Bayesian Light-Field Stereo Matching by Robust Pseudo Random Field Modeling CT Huang IEEE Transactions on Pattern Analysis and Machine Intelligence, 2018 | 64* | 2018 |
| eCNN: A Block-Based and Highly-Parallel CNN Accelerator for Edge Inference CT Huang, YC Ding, HC Wang, CW Weng, KP Lin, LW Wang, LD Chen Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 50 | 2019 |
| Apparatus for reference picture resampling generation and method thereof and video decoding system using the same YJ Huang, CT Huang, TS Huang US Patent 8,644,381, 2014 | 50 | 2014 |
| A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications CT Huang, M Tikekar, C Juvekar, V Sze, A Chandrakasan Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 …, 2013 | 41 | 2013 |
| Decoder Hardware Architecture for HEVC M Tikekar, CT Huang, C Juvekar, V Sze, A Chandrakasan Springer-Verlag, 2014 | 39* | 2014 |
| On-chip memory optimization scheme for VLSI implementation of line-based two-dimentional discrete wavelet transform CC Cheng, CT Huang, CY Chen, CJ Lian, LG Chen IEEE transactions on circuits and systems for video technology 17 (7), 814-822, 2007 | 39 | 2007 |
| Picture decoder CP Lin, CT Huang, YH Lu US Patent App. 12/748,365, 2011 | 38 | 2011 |
| Memory analysis and architecture for two-dimensional discrete wavelet transform CT Huang, PC Tseng, LG Chen Acoustics, Speech, and Signal Processing, 2004. Proceedings.(ICASSP'04 …, 2004 | 36 | 2004 |
| 81MS/s JPEG2000 single-chip encoder with rate-distortion optimization HC Fang, CT Huang, YW Chang, TC Wang, PC Tseng, CJ Lian, LG Chen 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004 | 36 | 2004 |
| Entropy decoding circuit, entropy decoding method, and entropy decoding method using pipeline manner CP Lin, CT Huang US Patent App. 12/189,814, 2009 | 33 | 2009 |
| Memory-hierarchical and mode-adaptive HEVC intra prediction architecture for quad full HD video decoding CT Huang, M Tikekar, AP Chandrakasan IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (7 …, 2013 | 31 | 2013 |
| Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization M Tikekar, CT Huang, V Sze, A Chandrakasan 2014 IEEE International Conference on Image Processing (ICIP), 2100-2104, 2014 | 26 | 2014 |
| VLSI architecture for forward discrete wavelet transform based on B-spline factorization CT Huang, PC Tseng, LG Chen Journal of VLSI signal processing systems for signal, image and video …, 2005 | 26 | 2005 |
Po-Chih TsengQualcommVerified email at qti.qualcomm.com
