| Graph-based algorithms for boolean function manipulation RE Bryant Computers, IEEE Transactions on 100 (8), 677-691, 1986 | 11493 | 1986 |
| Symbolic Boolean manipulation with ordered binary-decision diagrams RE Bryant ACM Computing Surveys (CSUR) 24 (3), 293-318, 1992 | 2834 | 1992 |
| Efficient implementation of a BDD package KS Brace, RL Rudell, RE Bryant ACM/IEEE Proc. 27th DAC, 40-45, 1990 | 1682* | 1990 |
| Semantics-aware malware detection M Christodorescu, S Jha, SA Seshia, D Song, RE Bryant 2005 IEEE Symposium on Security and Privacy (S&P'05), 32-46, 2005 | 905 | 2005 |
| On the complexity of VLSI implementations and graph representations of Boolean functions with application to integer multiplication RE Bryant IEEE transactions on Computers, 205-213, 1991 | 688 | 1991 |
| Computer systems: a programmer's perspective R Bryant, DR O'Hallaron Prentice Hall, 2003 | 572 | 2003 |
| Verification of arithmetic circuits with binary moment diagrams RE Bryant, YA Chen Design Automation, 1995. DAC'95. 32nd Conference on, 535-541, 1995 | 560 | 1995 |
| A switch-level model and simulator for MOS digital systems RE Bryant IEEE Transactions on computers, 160-177, 1984 | 496 | 1984 |
| Simulation of packet communication architecture computer systems RE Bryant Massachusetts Institute of Technology, 1977 | 445 | 1977 |
| Simulator for MOS Circuits RE Bryant, D Beatty, K Brace, K Cho, T Sheffler 24th ACM/IEEE Design Automation Conference, 9-16, 1987 | 341 | 1987 |
| Formal verification by symbolic evaluation of partially-ordered trajectories CJH Seger, RE Bryant Formal Methods in System Design 6 (2), 147-189, 1995 | 339 | 1995 |
| Binary decision diagrams and beyond: Enabling technologies for formal verification RE Bryant Proceedings of the 1995 IEEE/ACM international conference on Computer-aided …, 1995 | 314 | 1995 |
| Modeling and verifying systems using a logic of counter arithmetic with lambda expressions and uninterpreted functions RE Bryant, SK Lahiri, SA Seshia International Conference on Computer Aided Verification, 78-92, 2002 | 302 | 2002 |
| Effective use of boolean satisfiability procedures in the formal verification of superscalar and vliw microprocessors MN Velev, RE Bryant Journal of Symbolic Computation 35 (2), 73-106, 2003 | 282 | 2003 |
| Boolean analysis of MOS circuits RE Bryant figshare, 2002 | 242 | 2002 |
| Model checking, abstraction, and compositional verification DE Long, EM Clarke, RE Bryant, SD Brookes, O Grumberg CARNEGIE-MELLON UNIV PITTSBURGH PA SCHOOL OF COMPUTER SCIENCE, 1993 | 235 | 1993 |
| Data-intensive supercomputing: The case for DISC RE Bryant figshare, 2006 | 220 | 2006 |
| Big-data computing: creating revolutionary breakthroughs in commerce, science and society R Bryant, RH Katz, ED Lazowska December, 2008 | 206 | 2008 |
| Symbolic manipulation of boolean functions using a graphical representation RE Bryant Proceedings of the 22nd ACM/IEEE Design Automation Conference, 688-694, 1985 | 176 | 1985 |
| Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic RE Bryant, S German, MN Velev ACM Transactions on Computational Logic (TOCL) 2 (1), 93-134, 2001 | 157 | 2001 |
Sanjit A. SeshiaUniversity of California, BerkeleyVerified email at eecs.berkeley.edu
