‪Amin Vanak‬ - ‪Google Scholar‬

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Co-authors

Amir AminiAssociate Professor of Electronic Engineering,West Tehran Branch, Islamic Azad UniversityVerified email at wtiau.ac.ir
Seyyed Hossein PishgarDepartment of Electrical Engineering, Engineering Faculty, West Tehran Branch, Tehran, Iran.Verified email at wtiau.ac.ir
Reza Sabbaghi-NadooshanProfessor of Electrical Engineering, Islamic Azad University, Central Tehran BranchVerified email at iauctb.ac.ir

Amin Vanak

Amin Vanak

phd student of Islamic Azad University of Tehran

Verified email at wtiau.ac.ir

nanotechnology- SEMICONDUCTOR-junctionless transistor-RF


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Improvements in Reliability and RF Performance of Stacked Gate JLTFET Using p⁺ Pocket and Heterostructure Material A Vanak, A Amini, SH Pishgar Silicon 15 (9), 4137-4147, 2023	2	2023
Improvement of Power and Performance in NAND and D-Latch Gates using CNFET Technology A Vanak, R Sabbaghi-Nadooshan Journal of Nano Research 33, 126-136, 2015	1	2015
Designing Heterostructure Junctionless Tunnel Field Effect Transistor with Silicon-on-nothing Technology for DC parameter improvement A Vanak, A Amini Journal of Modeling in Engineering, 2023		2023

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Articles 1–3