| Impact of self-heating on RF/analog and linearity parameters of DMG FinFETs in underlap and overlap configurations R Chaudhary, R Saha Microelectronics Journal 135, 105765, 2023 | 5 | 2023 |
| Quality factor and digital inverter performance in gate underlap and overlap DMG FinFETs R Chaudhary, R Saha Materials Science and Engineering: B 299, 116991, 2024 | 4 | 2024 |
| Reliability study of nano ribbon FET with temperature variation including interface trap charges LN Teja, R Chaudhary, S Tiwari, R Saha Materials Science and Engineering: B 298, 116877, 2023 | 2 | 2023 |
| Analysis on the impact of interface Trap distributions on SOI DMG FinFETs: Overlap/underlap configurations R Chaudhary, R Saha Micro and Nanostructures 185, 207725, 2024 | 1 | 2024 |
| Physical insights of interface traps and self-heating effect on electrical response of DMG FinFETs in overlap and underlap configurations: analog/RF perspective R Chaudhary, R Saha Physica Scripta 99 (1), 015406, 2023 | 1 | 2023 |
| Realization of Logic Performance using Double Gate TFET (DG-TFET) and Ge source DG-TFET (s-Ge-TFET) HK Phulawariya, R Chaudhary, S Tiwari, R Saha 2023 3rd International conference on Artificial Intelligence and Signal …, 2023 | 1 | 2023 |
| Investigation on electrical parameters between single and double material gate nanoribbon FETs including trap distributions S Rai, S Tiwari, R Chaudhary, R Saha, R Sharma Materials Science and Engineering: B 303, 117326, 2024 | | 2024 |
| Analysis of thermal stability in underlap and overlap DMG FinFETs including self-heating effects R Chaudhary, R Saha, M Yadav Microelectronics Journal 146, 106152, 2024 | | 2024 |
| Performance Analysis of FinFET based Operational Amplifier at 20 nm gate Length D Singh, H Chordiya, R Chaudhary, M Yadav 2024 IEEE International Conference on Interdisciplinary Approaches in …, 2024 | | 2024 |
| Energy Efficient Vedic Multiplier D Singh, R Rajinikanth, R Chaudhary, M Yadav 2024 IEEE International Conference on Interdisciplinary Approaches in …, 2024 | | 2024 |
| Performances of gate stacked heterojunction SELBOX and SOI tunnel FETs including interface trap charges: A simulation study N Harsha, S Tiwari, R Chaudhary, R Saha Materials Science and Engineering: B 300, 117115, 2024 | | 2024 |
| Performance Analysis of Dielectric Modulated Dual Material Double Gate Hetero Stack (DM-DMDG-HS) TFET J Kumar, R Chaudhary, R Saha 2023 International Conference on Intelligent and Innovative Technologies in …, 2023 | | 2023 |
| Comparison of RF/Analog and Linearity Performance of Various TFETs Using Source Engineering J Kumar, R Chaudhary, S Tiwari, R Saha Silicon 14 (17), 11463-11470, 2022 | | 2022 |
Rajesh SahaNational Institute of Technology SilcharVerified email at ece.nits.ac.in
