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zaid alwardi
zaid alwardi
University Lecturer in Computer Engineering, Al-Mustansiriyah University
Verified email at uni-bremen.de
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Cited by
Cited by
Year
Towards line-aware realizations of expressions for HDL-based synthesis of reversible circuits
Z Al-Wardi, R Wille, R Drechsler
Reversible Computation: 7th International Conference, RC 2015, Grenoble …, 2015
102015
Synthesis of reversible circuits using conventional hardware description languages
Z Alwardi, R Wille, R Drechsler
2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL), 97-102, 2018
92018
Re-writing HDL descriptions for line-aware synthesis of reversible circuits
Z Alwardi, R Wille, R Drechsler
2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL), 31-36, 2016
72016
Radix-p Multiple Valued Logic Function Simplification using Higher Radix Representation
Z Al-Wardi
Journal of Physics: Conference Series 1804 (1), 012016, 2021
22021
Extensions to the reversible hardware description language SyReC
Z Alwardi, R Wille, R Drechsler
2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 185-190, 2017
22017
Towards VHDL-Based Design of Reversible Circuits: Work in Progress Report
Z Al-Wardi, R Wille, R Drechsler
Reversible Computation: 9th International Conference, RC 2017, Kolkata …, 2017
22017
Reducing Reversible Circuit Line Count Using Boolean Techniques
Z Al-Wardi
2023 3rd International Scientific Conference of Engineering Sciences (ISCES …, 2023
2023
RECURSIVE TERNARY-BASED ALGORITHM FOR COMPUTING PRIME IMPLICANTS OF MULTI-OUTPUT BOOLEAN FUNCTIONS
Z Al-Wardi, O Al-Wardi
JOURNAL OF ENGINEERING AND SUSTAINABLE DEVELOPMENT 27 (3), 2023
2023
Optimized Boolean expression embedding in quantum and reversible logic circuits
Z Al-Wardi
AIP Conference Proceedings 2591 (1), 2023
2023
HDL-based Synthesis of Reversible Circuits: A Scalable Design Approach
ZS Al-Wardi
Universität Bremen, 2018
2018
HDL-based Synthesis of Reversible Circuits
ZSA Al-Wardi
University of Bremen, 2018
2018
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