‪Manu Rathore‬ - ‪Google Scholar‬

Get my own profile

Cited by

	All	Since 2019
Citations	12	12
h-index	3	3
i10-index	0	0

0

8

4

2022202320241 8 3

Public access

0 articles

1 article

available

not available

Based on funding mandates

Co-authors

Garrett S. RoseProfessor, University of TennesseeVerified email at utk.edu
Nathaniel C. CadyEmpire Innovation Professor, SUNY Polytechnic InstituteVerified email at sunypoly.edu

Manu Rathore

Manu Rathore

PhD Student, University of Tennessee

Verified email at vols.utk.edu

Mixed Signal VLSI Design Neuromorphic Computing Emerging Devices Systems-on-chip Network-on-Chip


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Rfam: Reset-failure-aware-model for hfo2-based memristor to enhance the reliability of neuromorphic design H Das, M Rathore, R Febbo, M Liehr, NC Cady, GS Rose Proceedings of the Great Lakes Symposium on VLSI 2023, 281-286, 2023	6	2023
Reliability analysis of memristive reservoir computing architecture M Rathore, R Febbo, A Foshie, SNB Tushar, H Das, GS Rose Proceedings of the Great Lakes Symposium on VLSI 2023, 131-136, 2023	3	2023
A Compact Model for the Variable Switching Dynamics of HfO₂ Memristors M Rathore, RJ Weiss, MSA Shawkat, GS Rose, M Liehr, M Abedin, ... 2022 IEEE 65th International Midwest Symposium on Circuits and Systems …, 2022	3	2022
SpiCS-Net: Circuit Switched Network on Chip for Area-Efficient Spiking Recurrent Neural Networks M Rathore, GS Rose 2024 37th International Conference on VLSI Design and 2024 23rd …, 2024		2024

The system can't perform the operation now. Try again later.

Articles 1–4