| Leakage power and delay analysis of LECTOR based CMOS circuits P Verma, RA Mishra 2011 2nd International Conference on Computer and Communication Technology …, 2011 | 42 | 2011 |
| Estimation of leakage power and delay in CMOS circuits using parametric variation P Verma, AK Sharma, VS Pandey, A Noor, A Tanwar Perspectives in Science 8, 760-763, 2016 | 15 | 2016 |
| Temperature dependence of propagation delay characteristic in LECTOR based CMOS circuit P Verma, RA Mishra IJCA Special Issue on Electronics, Information and Communication Engineering …, 2011 | 10 | 2011 |
| SDTSPC-technique for low power noise aware 1-bit full adder P Verma, AK Sharma, A Noor, VS Pandey Analog Integrated Circuits and Signal Processing 92, 303-314, 2017 | 9 | 2017 |
| A novel approach for noise tolerant energy efficient TSPC dynamic circuit design P Verma, AK Sharma, A Noor, AK Mishra, VS Pandey Analog Integrated Circuits and Signal Processing 100, 119-131, 2019 | 3 | 2019 |
| Power gating and its repercussions—a review P Verma, A Noor, AK Sharma 2016 IEEE 1st International Conference on Power Electronics, Intelligent …, 2016 | 3 | 2016 |
| Design of Low Power N-Bridge Master and P-Bridge Slave Topologically Arranged Flip-Flop S Shukla, AK Mishra, P Verma, D Vaithiyanathan, B Kaur 2022 International Conference on Smart Generation Computing, Communication …, 2022 | 2 | 2022 |
| Estimation and analysis of novel dynamic body biased tspc design technique P Verma, VS Pandey, AK Sharma, A Noor MAPAN 33, 405-416, 2018 | 2 | 2018 |
| Safety Watch Based on the Internet of Things D Vaithiyanathan, K Verma, P Verma, B Kaur 2023 International Conference on Self Sustainable Artificial Intelligence …, 2023 | 1 | 2023 |
| Performance Analysis of Human Activity BK Rutuja Mhaiskar, Vaithiyanathan Dhandapani, Preeti Verma ITM Web of Conferences 56, 05006, 2023 | 1* | 2023 |
| Low Power High-Speed Optimized comparator for Flash ADC A Mishra, D Vaithiyanathan, P Verma, S Singh, B Kaur 2022 International Conference on Smart Generation Computing, Communication …, 2022 | 1 | 2022 |
| TSPC-HNTL: True Single Phase Clock technique for High speed, Noise Tolerance, and Low power P Verma, AK Sharma, VS Pandey, A Noor Analog Integrated Circuits and Signal Processing 112 (2), 333-345, 2022 | 1 | 2022 |
| Implementation and Analysis of Efficient Low Power Dynamic Circuit Technique P Verma, AK Mishra IEEE-International Conference on Smart Electronics and Communication (ICOSEC), 2021 | 1 | 2021 |
| Nano-Scaled Graphene Plasmonic-Based Vanadium Dioxide Yagi-Uda Array MIMO Antenna for Terahertz Applications R Yadav, VS Pandey, P Verma Plasmonics, 1-14, 2024 | | 2024 |
| Review of Dual-Edge Triggered Low-Power D Flip-Flops K Saiteja, D Vaithiyanathan, P Verma, B Kaur 2023 3rd International Conference on Smart Generation Computing …, 2023 | | 2023 |
| A modified dynamic comparator for lowering peak kink in differential amplifier and latch V Dhandapani, A Mishra, R Mishra, AK Mishra, P Verma, B Kaur AIP Conference Proceedings 2901 (1), 2023 | | 2023 |
| Implementation and Variability Analysis of Low-Power Robust Muller C-Element: LPRCE P Verma, VS Pandey, AK Sharma MAPAN 38 (1), 63-70, 2023 | | 2023 |
| Analytical study of the dual-band Log-periodic antenna with MIMO configuration for S-band CubeSat application PV R. Yadav, S. Gotra, V S Pandey IEEE International Conference on Electrical Electronics Communication and …, 2023 | | 2023 |
| Architectural Improvement and Performance Evaluation of 1D-to-2D Array Conversion Priority Encoder A Behera, AK Mishra, D Vaithiyanathan, P Verma 2022 International Conference on Smart Generation Computing, Communication …, 2022 | | 2022 |
| Design and Analysis of Groundless XNOR Gate topology in 90nm Technology P Verma, AK Sharma 2022 IEEE 3rd Global Conference for Advancement in Technology (GCAT), 1-4, 2022 | | 2022 |
Dr Ajay K SharmaDirector, National Institute of Technology, DelhiVerified email at nitj.ac.in
