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Anh T. Tran, Ph.D.
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A 167-processor computational platform in 65 nm CMOS
DN Truong, WH Cheng, T Mohsenin, Z Yu, AT Jacobson, G Landge, ...
IEEE Journal of Solid-State Circuits 44 (4), 1130-1144, 2009
3142009
KiloCore: A 32-nm 1000-processor computational array
B Bohnenstiehl, A Stillmaker, JJ Pimentel, T Andreas, B Liu, AT Tran, ...
IEEE Journal of Solid-State Circuits 52 (4), 891-902, 2017
1262017
A 167-processor 65 nm computational platform with per-processor dynamic supply voltage and dynamic clock frequency scaling
D Truong, W Cheng, T Mohsenin, Z Yu, T Jacobson, G Landge, ...
2008 IEEE Symposium on VLSI Circuits, 22-23, 2008
902008
A 5.8 pJ/Op 115 Billion Ops/sec, to 1.78 Trillion Ops/sec 32nm 1000-Processor Array
B Bohnenstiehl, A Stillmaker, J Pimentel, T Andreas, B Liu, AT Tran, ...
Symposium on VLSI Circuits, 2016
852016
Achieving high-performance on-chip networks with shared-buffer routers
AT Tran, BM Baas
IEEE Transactions on Very Large Scale Integration (TVLSI) Systems 22 (6 …, 2013
652013
NoCTweak: a highly parameterizable simulator for early exploration of performance and energy of networks on-chip
AT Tran, BM Baas
Technical Report, 1-12, 2012
612012
RoShaQ: high-performance on-chip router with shared queues
AT Tran, BM Baas
IEEE International Conference on Computer Design (ICCD), 232-238, 2011
552011
A reconfigurable source-synchronous on-chip network for GALS many-core platforms
AT Tran, DN Truong, B Baas
IEEE transactions on computer-aided design of integrated circuits and …, 2010
532010
A complete real-time 802.11 a baseband receiver implemented on an array of programmable processors
AT Tran, DN Truong, BM Baas
2008 42nd Asilomar Conference on Signals, Systems and Computers, 165-170, 2008
392008
KiloCore: A Fine-Grained 1,000-Processor Array for Task-Parallel Applications
B Bohnenstiehl, A Stillmaker, J Pimentel, T Andreas, B Liu, A Tran, ...
IEEE Micro 37 (2), 63-69, 2017
372017
Design of an energy-efficient 32-bit adder operating at subthreshold voltages in 45-nm CMOS
AT Tran, BM Baas
International Conference on Communications and Electronics 2010, 87-91, 2010
302010
KiloCore: A 32 nm 1000-processor array.
B Bohnenstiehl, A Stillmaker, JJ Pimentel, T Andreas, B Liu, A Tran, ...
Hot Chips Symposium, 1-23, 2016
282016
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
AT Tran, DN Truong, BM Baas
ACM/IEEE International Symposium on Networks-on-Chip (NOCS), 214-223, 2009
262009
Apparatus and method for scalable and flexible wildcard matching in a network switch
A Tran, J Huynh, W Wang
US Patent 10,091,137, 2018
222018
Method and system for reconfigurable parallel lookups using multiple shared memories
AT Tran, G Schmidt, T Daniel, S Shrivastava, Xpliant, Inc.
US Patent App. 14/142,511, 2015
172015
DLABS: A dual-lane buffer-sharing router architecture for networks on chip
AT Tran, BM Baas
2010 IEEE Workshop On Signal Processing Systems, 327-332, 2010
172010
Apparatus and method of generating lookups and making decisions for packet modifying and forwarding in a software-defined network engine
AT Tran, G Schmidt, T Daniel, H Krishnamoorthy, Xpliant, Inc.
US Patent US9379963 B2, 2015
162015
Matrix of on-chip routers interconnecting a plurality of processing engines and a method of routing using thereof
AT Tran, G Schmidt, T Daniel, N Siva, Xpliant, Inc.
US Patent US9548945 B2, 2015
162015
A low-cost high-speed source-synchronous interconnection technique for GALS chip multiprocessors
AT Tran, DN Truong, BM Baas
2009 IEEE International Symposium on Circuits and Systems, 996-999, 2009
152009
NoCTweak: A highly parameterizable simulator for early exploration of performance and energy efficiency of networks on-chip
AT Tran, BM Baas
Dept. Electr. Comput. Eng., Univ. California, Davis, CA, USA, Tech. Rep. ECE …, 2012
122012
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