| A 1.1 V 16Gb DDR5 DRAM with Probabilistic-Aggressor Tracking, Refresh-Management Functionality, Per-Row Hammer Tracking, a Multi-Step Precharge, and Core-Bias Modulation for … W Kim, C Jung, S Yoo, D Hong, J Hwang, J Yoon, O Jung, J Choi, S Hyun, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 1-3, 2023 | 15 | 2023 |
| Memory device for performing smart refresh operation and memory system including the same BY GO, W Kim, H Chung, SH Kim, OH Yoonna, CM Jung US Patent App. 17/731,375, 2023 | 1 | 2023 |
| Memory device for performing smart refresh operation and memory system including the same BY GO, W Kim, OH Yoonna US Patent App. 17/591,982, 2023 | 1 | 2023 |
| Integrated circuit and memory device including sampling circuit W Kim, BY GO, CM Jung, OH Yoonna US Patent App. 18/488,040, 2024 | | 2024 |
| Integrated circuit and memory device including sampling circuit JS Noh, BY Go, SW Yoon, NG Joo US Patent App. 17/993,635, 2023 | | 2023 |
| Integrated circuit and memory device including sampling circuit W Kim, BY GO, CM Jung, OH Yoonna US Patent App. 17/703,586, 2023 | | 2023 |
