Distributed computer task management of interrelated network computing tasks Y Jin, S Narravula, N Aghdaie, KAU Zaman, P Ganeshan, T Agarwal, ... US Patent 10,841,236, 2020 | 76 | 2020 |
Using information flow to design an ISA that controls timing channels D Zagieboylo, GE Suh, AC Myers 2019 IEEE 32nd Computer Security Foundations Symposium (CSF), 272-27215, 2019 | 34 | 2019 |
PDL: a high-level hardware design language for pipelined processors D Zagieboylo, C Sherk, GE Suh, AC Myers Proceedings of the 43rd ACM SIGPLAN International Conference on Programming …, 2022 | 4 | 2022 |
The cost of software-based memory management without virtual memory D Zagieboylo, GE Suh, AC Myers arXiv preprint arXiv:2009.06789, 2020 | 3 | 2020 |
Cost-Efficient and Reliable Reporting of Highly Bursty Video Game Crash Data D Zagieboylo, KA Zaman Proceedings of the 8th ACM/SPEC on International Conference on Performance …, 2017 | 1 | 2017 |
SpecVerilog: Adapting Information Flow Control for Secure Speculation D Zagieboylo, C Sherk, AC Myers, GE Suh Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications …, 2023 | | 2023 |
Language–Based Techniques for Building Timing Channel Secure Hardware–Software Systems D Zagieboylo Cornell University, 2023 | | 2023 |
A High-Level Hardware Design Language for Pipelined Processors D Zagieboylo, C Sherk, GE Suh, AC Myers | | 2022 |