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Chih-Yu Lai
Title
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Cited by
Year
Impedimetric aptasensing using a symmetric Randles circuit model
CY Lai, WC Huang, JH Weng, LC Chen, CF Chou, PK Wei
Electrochimica Acta 337, 135750, 2020
102020
Microfluidic amperometry with two symmetric Au microelectrodes under one-way and shuttle flow conditions
JH Weng, CY Lai, LC Chen
Electrochimica Acta 297, 118-128, 2019
82019
Diffusion impedance modeling for interdigitated array electrodes by conformal mapping and cylindrical finite length approximation
CY Lai, JH Weng, WL Shih, LC Chen, CF Chou, PK Wei
Electrochimica Acta 320, 134629, 2019
72019
Spectral contrast imaging method for mapping transmission surface plasmon images in metallic nanostructures
MY Pan, DK Yang, CY Lai, JH Weng, KL Lee, LC Chen, CF Chou, PK Wei
Biosensors and Bioelectronics 142, 111545, 2019
52019
Nominality Score Conditioned Time Series Anomaly Detection by Point/Sequential Reconstruction
CY Lai, FK Sun, Z Gao, JH Lang, DS Boning
Thirty-seventh Conference on Neural Information Processing Systems, 2023
42023
Semiconductor cell and active area arrangement
P Wang, CY Lai, CY Lu, SH Chiu, HZ Zhuang, CL Chen
US Patent US20230268339A1, 2023
12023
Provable Routing Analysis of Programmable Photonics
Z Gao, X Chen, Z Zhang, CY Lai, U Chakraborty, W Bogaerts, DS Boning
arXiv preprint arXiv:2306.12607, 2023
12023
Semiconductor device and method of making
CY Lai, CL Chen, CY Lu, SH Chiu
US Patent US20230008866A1, 2023
12023
對稱電極與指叉狀晶片電化學阻抗模型建立與適體感測應用
賴知佑
12019
Provable Routing Analysis of Programmable Photonic Circuits
Z Gao, X Chen, Z Zhang, CY Lai, U Chakraborty, W Bogaerts, DS Boning
Journal of Lightwave Technology, 2024
2024
Learned Image Compression with Text Quality Enhancement
CY Lai, D Tran, K Koishida
arXiv preprint arXiv:2402.08643, 2024
2024
Source/drain isolation structure, layout, and method
CY Lu, YH Chiu, CL Chen, CY Lai, SH Chiu
US Patent US20230386998A1, 2023
2023
First metal structure, layout, and method
CY Lu, CL Chen, CT Wu, CY Lai, SH Chiu
US Patent US20230387011A1, 2023
2023
Semiconductor devices with reduced effect of capacitive coupling
CY Lu, CY Lai, MH Wang, CL Chen, SH Chiu
US Patent US20230386997A1, 2023
2023
Method of manufacturing integrated circuit
CY Lai, HZ Zhuang, CL Chen, LC Tien
US Patent US20230387014A1, 2023
2023
Semiconductor device including through via and method of making
CY Lai, CL Chen, CY Lu, CH Wang
US Patent US20230343703A1, 2023
2023
Arrangement of source or drain conductors of transistor
CY Lai, CL Chen, CY Lu, SH Chiu
US Patent US20230154990A1, 2023
2023
Semiconductor device segmented interconnect
CY Lai, CL Chen, CW Tsai, SW Chang, LC Tien
US Patent US20230067952A1, 2023
2023
Integrated circuits having stacked transistors and backside power nodes
CY Lai, CL Chen, LC Tien
US Patent US20230067311A1, 2023
2023
Integrated circuit conductive line arrangement for circuit structures, and method
CY Lai, HZ Zhuang, CL Chen, LC Tien
US Patent US20230062140A1, 2023
2023
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