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Sasindu Wijeratne
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A high throughput parallel hash table on fpga using xor-based memory
R Zhang, S Wijeratne, Y Yang, SR Kuppannagari, VK Prasanna
2020 IEEE High performance extreme computing conference (HPEC), 1-7, 2020
82020
Reconfigurable co-processor architecture with limited numerical precision to accelerate deep convolutional neural networks
S Wijeratne, S Jayaweera, M Dananjaya, A Pasqual
2018 IEEE 29Th international conference on application-specific systems …, 2018
82018
Scalable High Performance SDN Switch Architecture on FPGA for Core Networks
S Wijeratne, A Ekanayake, S Jayaweera, D Ravishan, A Pasqual
arXiv preprint arXiv:1910.13683, 2019
72019
Accelerating sparse mttkrp for tensor decomposition on fpga
S Wijeratne, TY Wang, R Kannan, V Prasanna
Proceedings of the 2023 ACM/SIGDA International Symposium on Field …, 2023
42023
Reconfigurable low-latency memory system for sparse matricized tensor times khatri-rao product on fpga
S Wijeratne, R Kannan, V Prasanna
2021 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2021
42021
Exploiting on-chip heterogeneity of versal architecture for gnn inference acceleration
P Chen, P Manjunath, S Wijeratne, B Zhang, V Prasanna
2023 33rd International Conference on Field-Programmable Logic and …, 2023
32023
Graph neural network for accurate and low-complexity sar atr
B Zhang, S Wijeratne, R Kannan, V Prasanna, C Busart
arXiv preprint arXiv:2305.07119, 2023
32023
Dynasor: A Dynamic Memory Layout for Accelerating Sparse MTTKRP for Tensor Decomposition on Multi-core CPU
S Wijeratne, R Kannan, V Prasanna
2023 IEEE 35th International Symposium on Computer Architecture and High …, 2023
22023
Performance modeling sparse mttkrp using optical static random access memory on fpga
S Wijeratne, A Jaiswal, AP Jacob, B Zhang, V Prasanna
2022 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2022
22022
Programmable fpga-based memory controller
S Wijeratne, S Pattnaik, Z Chen, R Kannan, V Prasanna
2021 IEEE Symposium on High-Performance Interconnects (HOTI), 43-51, 2021
22021
Graph neural network based SAR automatic target recognition with human-in-the-loop
B Zhang, S Wijeratne, R Kannan, V Prasanna, C Busart
Algorithms for Synthetic Aperture Radar Imagery XXX 12520, 196-198, 2023
12023
Towards programmable memory controller for tensor decomposition
S Wijeratne, TY Wang, R Kannan, V Prasanna
arXiv preprint arXiv:2207.08298, 2022
12022
High performance hardware architectures for Intra Block Copy and Palette Coding for HEVC screen content coding extension
R Senanayake, N Liyanage, S Wijeratne, S Atapattu, K Athukorala, ...
2017 IEEE 28th International Conference on Application-specific Systems …, 2017
12017
How can Human-in-the-loop Improve the Performance of SAR ATR? A Reinforcement Learning Based Approach
B Zhang, S Wijeratne, T Ye, R Kannan, V Prasanna, C Busart, L Kaplan
2023 IEEE International Radar Conference (RADAR), 1-6, 2023
2023
PAHD: perception-action based human decision making using explainable graph neural networks on SAR images
S Wijeratne, B Zhang, R Kannan, V Prasanna, C Busart
Automatic Target Recognition XXXIII 12521, 49-55, 2023
2023
Modeling the Energy Efficiency of GEMM using Optical Random Access Memory
B Zhang, A Jaiswal, C Mathew, RT Lakkireddy, AP Jacob, S Wijeratne, ...
2022 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2022
2022
Estimating the Impact of Communication Schemes for Distributed Graph Processing
T Ye, SR Kuppannagari, CAF De Rose, S Wijeratne, R Kannan, ...
2022 21st International Symposium on Parallel and Distributed Computing …, 2022
2022
SBAC-PAD 2023
S Santos, TR Kepe, AZ Marco, A Cano, C Camarero, R Beivide, ...
ASAP 2022
A Ilic, A Zou, A Holey, A Stefanidis, A Elakhras, B Zhang, C Heidorn, ...
Ahmad, Tanveer 138 Allombert, Victor 41 Amarasekera, Dinesh 114 Apostol, Gabriel-Cosmin 65 Ars, Zaid 138
S Azimi, I Banicescu, LM Bayati, N Berger, C Bobda, RI Ciobanu, ...
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