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Peter Sarson
Peter Sarson
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Cited by
Cited by
Year
A/MS benchmark circuits for comparing fault simulation, DFT, and test generation methods
S Sunter, P Sarson
2017 IEEE International Test Conference (ITC), 1-7, 2017
272017
An automatic approach to perform the verification of hardware designs according to the ISO26262 functional safety standard
E Bagalini, J Sini, MS Reorda, M Violante, H Klimesch, P Sarson
2017 18th IEEE Latin American Test Symposium (LATS), 1-6, 2017
172017
Automated die inking: A pattern recognition-based approach
C Xanthopoulos, P Sarson, H Reiter, Y Makris
2017 IEEE International Test Conference (ITC), 1-6, 2017
142017
Using distortion shaping technique to equalize ADC THD performance between ATEs
P Sarson, H Kobayashi
Journal of Electronic Testing 33 (3), 295-303, 2017
112017
Automated die inking
C Xanthopoulos, A Neckermann, P List, KP Tschernay, P Sarson, ...
IEEE Transactions on Device and Materials Reliability 20 (2), 295-307, 2020
82020
Variation and failure characterization through pattern classification of test data from multiple test stages
CK Hsu, P Sarson, G Schatzberger, F Leisenberger, J Carulli, ...
2016 IEEE International Test Conference (ITC), 1-10, 2016
82016
Online information utility assessment for per-device adaptive test flow
Y Li, E Yilmaz, P Sarson, S Ozev
2018 IEEE 36th VLSI Test Symposium (VTS), 1-6, 2018
72018
High efficient low cost EEPROM screening method in combination with an area optimized byte replacement strategy which enables high reliability EEPROMs
G Schatzberger, FP Leisenberger, P Sarson, A Wiesner
2018 IEEE 36th VLSI Test Symposium (VTS), 1-6, 2018
72018
Use models for extending IEEE 1687 to analog test
P Sarson, J Rearick
2017 IEEE International Test Conference (ITC), 1-8, 2017
62017
A technique for dynamic range improvement of intermodulation distortion products for an Interpolating DAC-based Arbitrary Waveform Generator using a phase switching algorithm
P Sarson, S Shibuya, T Yanagida, H Kobayashi
2017 IEEE 35th VLSI Test Symposium (VTS), 1-6, 2017
62017
Group delay filter measurement using a chirp
P Sarson
2016 21th IEEE European Test Symposium (ETS), 1-2, 2016
62016
Test time efficient group delay filter characterization technique using a discrete chirped excitation signal
P Sarson
2016 IEEE International Test Conference (ITC), 1-6, 2016
52016
RF Filter Characterization using a chirp
P Sarson
2014 9th International Design and Test Symposium (IDT), 1-5, 2014
52014
Automotive EEPROM qualification and cost optimization
P Sarson, G Schatzberger, R Seitz
2013 22nd Asian Test Symposium, 105-106, 2013
52013
A distortion shaping technique to equalize intermodulation distortion performance of interpolating arbitrary waveform generators in automated test equipment
P Sarson, T Yanagida, S Shibuya, K Machida, H Kobayashi
Journal of Electronic Testing 34, 215-232, 2018
42018
Fast bit screening of automotive grade EEPROMs—Continuous improvement exercise
PG Sarson, G Schatzberger, FP Leisenberger
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (4 …, 2016
42016
Automated die inking through on-line machine learning
C Xanthopoulos, A Neckermann, P List, KP Tschernay, P Sarson, ...
2019 IEEE 25th International Symposium on On-Line Testing and Robust System …, 2019
32019
Yield improvement of an EEPROM for automotive applications while maintaining high reliability
G Schatzberger, FP Leisenberger, P Sarson
2016 IEEE 34th VLSI Test Symposium (VTS), 1-6, 2016
32016
An ATE filter characterization toolkit using a discrete chirped excitation signal as stimulus
P Sarson
Journal of Electronic Testing 33 (3), 283-294, 2017
22017
Measuring Group Delay of Frequency Downconverter Devices Using a Chirped RF Modulated Signal
P Sarson, T Yanagida, K Machida
Journal of Electronic Testing 34, 233-253, 2018
12018
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Articles 1–20