| 9.1 A 7nm 4-core AI chip with 25.6 TFLOPS hybrid FP8 training, 102.4 TOPS INT4 inference and workload-aware throttling A Agrawal, SK Lee, J Silberman, M Ziegler, M Kang, S Venkataramani, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 144-146, 2021 | 71 | 2021 |
| RaPiD: AI accelerator for ultra-low precision training and inference S Venkataramani, V Srinivasan, W Wang, S Sen, J Zhang, A Agrawal, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 68 | 2021 |
| Capacitor-based cross-point array for analog neural network with record symmetry and linearity Y Li, S Kim, X Sun, P Solomon, T Gokmen, H Tsai, S Koswatta, Z Ren, ... 2018 IEEE Symposium on VLSI Technology, 25-26, 2018 | 49 | 2018 |
| Learning cross-lingual IR from an english retriever Y Li, M Franz, MA Sultan, B Iyer, YS Lee, A Sil arXiv preprint arXiv:2112.08185, 2021 | 22 | 2021 |
| Counter based resistive processing unit for programmable and reconfigurable artificial-neural-networks S Koswatta, Y Li, PM Solomon US Patent 11,222,259, 2022 | 18 | 2022 |
| A 7-nm four-core mixed-precision AI chip with 26.2-TFLOPS hybrid-FP8 training, 104.9-TOPS INT4 inference, and workload-aware throttling SK Lee, A Agrawal, J Silberman, M Ziegler, M Kang, S Venkataramani, ... IEEE Journal of Solid-State Circuits 57 (1), 182-197, 2021 | 16 | 2021 |
| Fully-depleted silicon-on-insulator devices for radiation dosimetry in cancer therapy Y Li, WM Porter, C Kshirsagar, I Roth, Y Su, MA Reynolds, BJ Gerbi, ... IEEE Transactions on Nuclear Science 61 (6), 3443-3450, 2014 | 15 | 2014 |
| Field effect transistor with controllable resistance Y Li, PM Solomon, S Koswatta US Patent 10,374,041, 2019 | 14 | 2019 |
| Unassisted true analog neural network training chip Y Kohda, Y Li, K Hosokawa, S Kim, R Khaddam-Aljameh, Z Ren, ... 2020 IEEE International Electron Devices Meeting (IEDM), 36.2. 1-36.2. 4, 2020 | 10 | 2020 |
| Floating gate architecture for deep neural network application E Leobandung, Y Li, PM Solomon, CC Yeh US Patent 10,134,472, 2018 | 8 | 2018 |
| Metal-insulator-metal capacitor analog memory unit cell E Leobandung, Y Li, P Solomon, CC Yeh US Patent 10,204,907, 2019 | 6 | 2019 |
| Circuit for CMOS based resistive processing unit Y Li, P Solomon, E Leobandung, CC Yeh, S Kim US Patent 11,055,610, 2021 | 5 | 2021 |
| Field effect transistor with controllable resistance Y Li, PM Solomon, S Koswatta US Patent 10,586,849, 2020 | 5 | 2020 |
| Capacitance-based dosimetry of Co-60 radiation using fully-depleted silicon-on-insulator devices Y Li, WM Porter, R Ma, MA Reynolds, BJ Gerbi, SJ Koester IEEE transactions on nuclear science 62 (6), 3012-3019, 2015 | 5 | 2015 |
| PrimeQA: the prime repository for state-of-the-art multilingual question answering research and development A Sil, J Sen, B Iyer, M Franz, K Fadnis, M Bornea, S Rosenthal, ... arXiv preprint arXiv:2301.09715, 2023 | 4 | 2023 |
| Synchronized analog capacitor arrays for parallel convolutional neural network training E Leobandung, MJ Rasch, Y Li 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems …, 2020 | 4 | 2020 |
| Indirect readout FET JP Han, Y Li, DM Newns, PM Solomon, X Sun US Patent 10,559,562, 2020 | 4 | 2020 |
| Demonstration of a Passive Wireless Radiation Detector Using Fully-Depleted Silicon-on-Insulator Variable Capacitors Y Li, VRSK Chaganti, MA Reynolds, BJ Gerbi, SJ Koester IEEE Transactions on Nuclear Science 64 (1), 544-549, 2016 | 4 | 2016 |
| Indirect readout FET JP Han, Y Li, DM Newns, PM Solomon, X Sun US Patent 10,332,874, 2019 | 3 | 2019 |
| Resistive processing unit weight reading via collection of differential current from first and second memory elements Y Li, PM Solomon US Patent 10,319,439, 2019 | 3 | 2019 |
