Saavan Patel - Google Scholar

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Co-authors

Sayeef SalahuddinTSMC Distinguished Professor of EECS, University of California, BerkeleyVerified email at berkeley.edu
Vivek SubramanianEcole polytechnique Federale de Lausanne (EPFL)Verified email at epfl.ch
William ScheidelerAssistant Professor, Dartmouth CollegeVerified email at dartmouth.edu
Muhammed Ahosan Ul KarimElectrical Engineering and Computer Sciences, University of California, BerkeleyVerified email at eecs.berkeley.edu

Saavan Patel

Saavan Patel

PhD Student, University of California Berkeley

Verified email at berkeley.edu


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Logically synthesized and hardware-accelerated restricted Boltzmann machines for combinatorial optimization and integer factorization S Patel, P Canoza, S Salahuddin Nature Electronics 5 (2), 92-101, 2022	30	2022
Ising Model Optimization Problems on a FPGA Accelerated Restricted Boltzmann Machine S Patel, L Chen, P Canoza, S Salahuddin arXiv preprint arXiv:2008.04436, 2020	23	2020
Distributed On-Sensor Compute System for AR/VR Devices: A Semi-Analytical Simulation Framework for Power Estimation J Gomez, S Patel, SS Sarwar, Z Li, R Capoccia, Z Wang, R Pinkham, ... arXiv preprint arXiv:2203.07474, 2022	15	2022
Inkjet-printed MEM relays for active solar cell routing S Patel, WJ Scheideler, MAU Karim, V Subramanian 2018 IEEE Micro Electro Mechanical Systems (MEMS), 616-619, 2018	1	2018
Combining Learned Representations for Combinatorial Optimization S Patel, S Salahuddin arXiv preprint arXiv:1909.03978, 2019		2019

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