| Optimising hardware accelerated neural networks with quantisation and a knowledge distillation evolutionary algorithm R Stewart, A Nowlan, P Bacchus, Q Ducasse, E Komendantskaya Electronics 10 (4), 396, 2021 | 16 | 2021 |
| Benchmarking quantized neural networks on FPGAs with FINN Q Ducasse, P Cotret, L Lagadec, R Stewart arXiv preprint arXiv:2102.01341, 2021 | 16 | 2021 |
| Porting a JIT compiler to RISC-v: Challenges and opportunities Q Ducasse, G Polito, P Tesone, P Cotret, L Lagadec Proceedings of the 19th International Conference on Managed Programming …, 2022 | 3 | 2022 |
| Gigue: A JIT Code Binary Generator for Hardware Testing Q Ducasse, P Cotret, L Lagadec Proceedings of the 15th ACM SIGPLAN International Workshop on Virtual …, 2023 | | 2023 |
| JIT Compiler Security through Low-Cost RISC-V Extension Q Ducasse, P Cotret, L Lagadec 2023 IEEE International Parallel and Distributed Processing Symposium …, 2023 | | 2023 |
| Securing a high-level language virtual machine through its ISA: Pharo as a case study Q Ducasse, P Cotret, L Lagadec GDR SoC², 2021 | | 2021 |
