A 4.5 mW CT Self-CoupledModulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation CY Ho, C Liu, CL Lo, HC Tsai, TC Wang, YH Lin IEEE Journal of Solid-State Circuits 50 (12), 2870-2879, 2015 | 82 | 2015 |
A 4.5 mW CT Self-CoupledModulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation CY Ho, C Liu, CL Lo, HC Tsai, TC Wang, YH Lin IEEE Journal of Solid-State Circuits 50 (12), 2870-2879, 2015 | 82 | 2015 |
A 64-fJ/Conv.-Step Continuous-Time Modulator in 40-nm CMOS Using Asynchronous SAR Quantizer and Digital Truncator HC Tsai, CL Lo, CY Ho, YH Lin IEEE journal of solid-state circuits 48 (11), 2637-2648, 2013 | 57 | 2013 |
A quadrature bandpass continuous-time delta-sigma modulator for a tri-mode GSM-EDGE/UMTS/DVB-T receiver CY Ho, WS Chan, YY Lin, TH Lin IEEE journal of solid-state circuits 46 (11), 2571-2582, 2011 | 41 | 2011 |
An 87.1% efficiency RF-PA envelope-tracking modulator for 80MHz LTE-Advanced transmitter and 31dBm PA output power for HPUE in 0.153 μm CMOS CY Ho, SM Lin, CH Meng, HP Hong, SH Yan, TH Kuo, CS Peng, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 432-434, 2018 | 27 | 2018 |
A 75.1 dB SNDR 840MS/s CT ΔΣ modulator with 30MHz bandwidth and 46.4 fJ/conv FOM in 55nm CMOS CL Lo, CY Ho, HC Tsai, YH Lin 2013 Symposium on VLSI Circuits, C60-C61, 2013 | 24 | 2013 |
When are public-private partnerships not an appropriate governance structure? Case study evidence SP Ho, CW Tsui Construction Research Congress 2010: Innovation for Reshaping Construction …, 2010 | 14 | 2010 |
Continuous time delta sigma modulator, analog to digital converter and associated compensation method CY Ho, YH Lin, TC Wang US Patent 9,537,497, 2017 | 13 | 2017 |
A 1.2 V 64fJ/conversion-step continuous-time ΣΔ modulator using asynchronous SAR quantizer and digital ΣΔ truncator HC Tsai, CL Lo, CY Ho, YH Lin 2012 IEEE Asian Solid State Circuits Conference (A-SSCC), 241-244, 2012 | 12 | 2012 |
A 75.1 dB SNDR, 80.2 dB DR, 4th-order feed-forward continuous-time sigma-delta modulator with hybrid integrator for silicon TV-tuner application CY Ho, ZM Lee, MC Huang, SJ Huang IEEE Asian Solid-State Circuits Conference 2011, 261-264, 2011 | 11 | 2011 |
Power supply with envelope tracking modulation SM Lin, CW Kuan, CH Meng, CY Ho US Patent 11,088,660, 2021 | 9 | 2021 |
Sigma-delta modulators with excess loop delay compensation CY Ho, CL Lo, HC Tsai, YH Lin US Patent 8,791,848, 2014 | 9 | 2014 |
Sigma-delta modulators with high speed feed-forward architecture CY Ho, HC Tsai, YH Lin US Patent 9,019,136, 2015 | 8 | 2015 |
Dual-mode continuous-time quadrature bandpass ΔΣ modulator with pseudo-random quadrature mismatch shaping algorithm for low-IF receiver application CY Ho, YY Lin, TH Lin Proceedings of 2010 IEEE International Symposium on Circuits and Systems, 25-28, 2010 | 8 | 2010 |
Power supply circuit of wireless mobile device SM Lin, CW Kuan, CY Ho, CH Meng, TM Chen, CS Peng, SH Yan US Patent 9,912,306, 2018 | 7 | 2018 |
A quadrature bandpass continuous-time delta-sigma modulator for tri-mode GSM-EDGE/UMTS/DVB-T receivers, with power scaling technique CY Ho, WS Chan, YY Lin, TH Lin 2010 IEEE Asian Solid-State Circuits Conference, 1-4, 2010 | 7 | 2010 |
Operational amplifier circuits HC Tsai, CL Lo, CY Ho, YH Lin US Patent 8,890,611, 2014 | 5 | 2014 |
Circuit module having dual-mode wideband power amplifier architecture SH Yan, DW Sung, CY Ho, CS Peng, CW Kuan US Patent 10,483,925, 2019 | 4 | 2019 |
Sigma-delta modulator having a feed-forward path and a hybrid portion SJ Huang, CY Ho US Patent 8,552,894, 2013 | 4 | 2013 |
Low-ripple latch circuit for reducing short-circuit current effect CY Ho, YH Lin, HC Tsai, TC Wang US Patent 9,559,674, 2017 | 3 | 2017 |