| A lightweight masked AES implementation for securing IoT against CPA attacks W Yu, S Köse IEEE Transactions on Circuits and Systems I: Regular Papers 64 (11), 2934-2944, 2017 | 98 | 2017 |
| Leveraging on-chip voltage regulators as a countermeasure against side-channel attacks W Yu, OA Uzun, S Köse Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 75 | 2015 |
| A voltage regulator-assisted lightweight AES implementation against DPA attacks W Yu, S Köse IEEE Transactions on Circuits and Systems I: Regular Papers 63 (8), 1152-1163, 2016 | 63 | 2016 |
| Exploiting voltage regulators to enhance various power attack countermeasures W Yu, S Köse IEEE Transactions on emerging topics in Computing 6 (2), 244-257, 2016 | 52 | 2016 |
| Charge-withheld converter-reshuffling: A countermeasure against power analysis attacks W Yu, S Köse IEEE Transactions on Circuits and Systems II: Express Briefs 63 (5), 438-442, 2015 | 33 | 2015 |
| ThermoGater: Thermally-aware on-chip voltage regulation SK Khatamifard, L Wang, W Yu, S Köse, UR Karpuzcu ACM SIGARCH Computer Architecture News 45 (2), 120-132, 2017 | 32 | 2017 |
| Security-adaptive voltage conversion as a lightweight countermeasure against LPA attacks W Yu, S Köse IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (7 …, 2017 | 29 | 2017 |
| False key-controlled aggressive voltage scaling: A countermeasure against LPA attacks W Yu, S Köse IEEE Transactions on computer-aided design of integrated circuits and …, 2017 | 28 | 2017 |
| Time-delayed converter-reshuffling: An efficient and secure power delivery architecture W Yu, S Köse IEEE Embedded Systems Letters 7 (3), 73-76, 2015 | 25 | 2015 |
| Deep learning‐assisted and combined attack: a novel side‐channel attack W Yu, J Chen Electronics Letters 54 (19), 1114-1116, 2018 | 24 | 2018 |
| Security implications of simultaneous dynamic and leakage power analysis attacks on nanoscale cryptographic circuits W Yu, S Köse Electronics Letters 52 (6), 466-468, 2016 | 20 | 2016 |
| Combining thermal maps with inception neural networks for hardware trojan detection Y Wen, W Yu IEEE Embedded Systems Letters 13 (2), 45-48, 2020 | 17 | 2020 |
| Efficient hybrid side‐channel/machine learning attack on XOR PUFs W Yu, Y Wen Electronics Letters 55 (20), 1080-1082, 2019 | 15 | 2019 |
| Masked AES PUF: a new PUF against hybrid SCA/MLAs W Yu, J Chen Electronics Letters 54 (10), 618-620, 2018 | 15 | 2018 |
| Machine learning‐resistant pseudo‐random number generator Y Wen, W Yu Electronics Letters 55 (9), 515-517, 2019 | 14 | 2019 |
| Exploiting multi-phase on-chip voltage regulators as strong PUF primitives for securing IoT W Yu, Y Wen, S Köse, J Chen Journal of Electronic Testing 34, 587-598, 2018 | 14 | 2018 |
| Implications of noise insertion mechanisms of different countermeasures against side-channel attacks W Yu, S Köse 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 11 | 2017 |
| Convolutional neural network attack on cryptographic circuits W Yu Electronics Letters 55 (5), 246-248, 2019 | 10 | 2019 |
| Breaking LPA-resistant cryptographic circuits with principal component analysis Y Wen, W Yu Integration 80, 1-4, 2021 | 8 | 2021 |
| Method for manufacturing semiconductor structure H Yin, W Yu US Patent App. 14/354,894, 2014 | 8 | 2014 |
Selçuk KöseUniversity of RochesterVerified email at ur.rochester.edu
