StarPlace: A new analytic method for FPGA placement M Xu, G Gréwal, S Areibi Integration 44 (3), 192-204, 2011 | 78 | 2011 |
An integrated approach to retargetable code generation T Wilson, G Grewal, B Halley, D Banerji Proceedings of 7th International Symposium on High-Level Synthesis, 70-75, 1994 | 69 | 1994 |
GPlace3. 0: Routability-driven analytic placer for UltraScale FPGA architectures Z Abuowaimer, D Maarouf, T Martin, J Foxcroft, G Gréwal, S Areibi, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 23 (5 …, 2018 | 63 | 2018 |
GPlace: A congestion-aware placement tool for ultrascale FPGAs R Pattison, Z Abuowaimer, S Areibi, G Gréwal, A Vannelli 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-7, 2016 | 46 | 2016 |
Machine-learning based congestion estimation for modern FPGAs D Maarouf, A Alhyari, Z Abuowaimer, T Martin, A Gunter, G Grewal, ... 2018 28th International Conference on Field Programmable Logic and …, 2018 | 42 | 2018 |
A machine-learning based approach for measuring the completeness of online privacy policies N Guntamukkala, R Dara, G Grewal 2015 IEEE 14th international conference on machine learning and applications …, 2015 | 37 | 2015 |
An ILP-based approach to code generation T Wilson, G Grewal, S Henshall, D Banerji Code Generation for Embedded Processors, 103-118, 2002 | 32 | 2002 |
A deep learning framework to predict routability for fpga circuit placement A Al-Hyari, H Szentimrey, A Shamli, T Martin, G Grewal, S Areibi ACM Transactions on Reconfigurable Technology and Systems (TRETS) 14 (3), 1-28, 2021 | 30 | 2021 |
Hierarchical FPGA placement S Areibi, G Grewal, D Banerji, P Du Canadian Journal of Electrical and Computer Engineering 32 (1), 53-64, 2007 | 27 | 2007 |
An enhanced genetic algorithm for solving the high-level synthesis problems of scheduling, allocation, and binding GW Grewal, TC Wilson International Journal of Computational Intelligence and Applications 1 (01 …, 2001 | 26 | 2001 |
An ILP solution for simultaneous scheduling, allocation, and binding in multiple block synthesis TC Wilson, GW Grewal, DK Banerji Proceedings 1994 IEEE International Conference on Computer Design: VLSI in …, 1994 | 24 | 1994 |
A flat timing-driven placement flow for modern FPGAs T Martin, D Maarouf, Z Abuowaimer, A Alhyari, G Grewal, S Areibi Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 22 | 2019 |
A scalable, serially-equivalent, high-quality parallel placement methodology suitable for modern multicore and GPU architectures C Fobel, G Grewal, D Stacey 2014 24th International Conference on Field Programmable Logic and …, 2014 | 22 | 2014 |
Near-linear wirelength estimation for FPGA placement M Xu, G Gréwal, S Areibi, C Obimbo, D Banerji Canadian Journal of Electrical and Computer Engineering 34 (3), 125-132, 2009 | 21 | 2009 |
Automatic flow selection and quality-of-result estimation for FPGA placement G Grewal, S Areibi, M Westrik, Z Abuowaimer, B Zhao 2017 IEEE International Parallel and Distributed Processing Symposium …, 2017 | 18 | 2017 |
The Pilot approach to cluster programming in C J Carter, WB Gardner, G Grewal 2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010 | 18 | 2010 |
An evolutionary approach to behavioural-level synthesis G Gréwal, M O'Cleirigh, M Wineberg The 2003 Congress on Evolutionary Computation, 2003. CEC'03. 1, 264-272, 2003 | 18 | 2003 |
A deep-learning framework for predicting congestion during FPGA placement D Maarouff, A Shamli, T Martin, G Grewal, S Areibi 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 16 | 2020 |
A dynamic sampling framework for multi-class imbalanced data B Debowski, S Areibi, G Gréwal, J Tempelman 2012 11th International Conference on Machine Learning and Applications 2 …, 2012 | 14 | 2012 |
Mapping reference code to irregular DSPs within the retargetable, optimizing compiler COGEN (T) GW Gréwal, CT Wilson International Journal of Computational Intelligence and Applications 3 (01 …, 2003 | 14 | 2003 |