| Novel control unit design for a high-speed sha-3 architecture P Gangwar, N Pandey, R Pandey 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems …, 2019 | 5 | 2019 |
| Hardware/software co-design of a high-speed Othello solver P Gangwar, S Maurya, S Garg, S Goyal, AS Kumar, P Dalmia, N Pandey 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems …, 2019 | 4 | 2019 |
| FHEmem: A Processing In-Memory Accelerator for Fully Homomorphic Encryption M Zhou, Y Nam, P Gangwar, W Xu, A Dutta, K Subramanyam, ... arXiv preprint arXiv:2311.16293, 2023 | | 2023 |
| TermiNETor: Early Convolution Termination for Efficient Deep Neural Networks U Mallappa, P Gangwar, B Khaleghi, H Yang, T Rosing 2022 IEEE 40th International Conference on Computer Design (ICCD), 635-643, 2022 | | 2022 |
