Design an optimal digital phase lock loop with current-starved ring VCO using CMOS technology R Yadav, U Kumari International Journal of Information Technology 13 (4), 1625-1631, 2021 | 13 | 2021 |
Design and implementation of an efficient memristor-based chaotic circuit U Kumari, R Yadav International Journal of Information Technology 15 (8), 4449-4458, 2023 | 1 | 2023 |
A Review About the Design Methodology and Optimization Techniques of CMOS Using Low Power VLSI U Kumari, R Yadav International Conference on IoT, Intelligent Computing and Security: Select …, 2023 | 1 | 2023 |
Implementation of tunable OTA-based memristor emulator circuit with chaotic behavior U Kumari, R Yadav Multiscale and Multidisciplinary Modeling, Experiments and Design, 1-16, 2023 | | 2023 |
The extreme vertices of the power graph of group U Kumari, R Yadav, A Sehgal, S Mehra Journal of Applied Mathematics and Computing 69 (5), 3835-3849, 2023 | | 2023 |
A Review About Analysis and Design Methodology of Two-Stage Operational Transconductance Amplifier (OTA) U Kumari, R Yadav Proceedings of International Conference on Data Science and Applications …, 2023 | | 2023 |