| Multiple frequency phase-locked loop clock generator with stable transitions between frequencies HF Lada Jr, HQ Le, JH Garrett, JM Gromala US Patent 5,142,247, 1992 | 156 | 1992 |
| Computer system and method for replacing obsolete or corrupt boot code contained within reprogrammable memory with new boot code supplied from an external source through a data … PR Cooper, DJ DeLisle, HQ Le US Patent 5,805,882, 1998 | 145 | 1998 |
| Computer access via a single-use password MF Angelo, DF Heinrich, HQ Le, RO Waldorf US Patent 6,370,649, 2002 | 142 | 2002 |
| Programming memory devices through the parallel port of a computer system HQ Le, PR Cooper US Patent 5,729,683, 1998 | 94 | 1998 |
| Flash ROM sharing between processor and microcontroller during booting and handling warm-booting events HQ Le, DJ DeLisle, ML Melo US Patent 5,819,087, 1998 | 67 | 1998 |
| Apparatus and method for providing access security to a device coupled upon a two-wire bidirectional bus DF Heinrich, HQ Le, PB Rawlins, CJ Stancil US Patent 6,510,522, 2003 | 62 | 2003 |
| Flash ROM sharing between processor and microcontroller during booting and handling warm-booting events HQ Le, DJ DeLisle, ML Melo US Patent 6,154,838, 2000 | 42 | 2000 |
| Computer architecture with password-checking bus bridge DF Heinrich, HQ Le, RO Waldorf, MF Angelo US Patent 6,199,167, 2001 | 36 | 2001 |
| Serial bus system for shadowing registers DJ Maguire, HQ Le US Patent 5,748,911, 1998 | 30 | 1998 |
| Battery charger HQ Le, DP Perkins US Patent 5,304,916, 1994 | 27 | 1994 |
| Dynamically adaptive buffer mechanism HQ Le US Patent 6,678,813, 2004 | 23 | 2004 |
| Apparatus and method for maintaining secured access to relocated plug and play peripheral devices DF Heinrich, HQ Le US Patent 6,542,995, 2003 | 22 | 2003 |
| Circuit and method employing feedback for driving a clocking signal to compensate for load-induced skew PR Culley, HQ Le US Patent 6,182,236, 2001 | 18 | 2001 |
| Programmable memory device that supports multiple operational modes HQ Le, SP Olarig US Patent 5,867,444, 1999 | 18 | 1999 |
| Memory subsystem having a first portion to store data with error correction code information and a second portion to store data without error correction code information TF Emerson, DF Heinrich, HQ Le US Patent 8,738,995, 2014 | 17 | 2014 |
| Dynamically adaptive buffer mechanism HQ Le US Patent 6,938,143, 2005 | 15 | 2005 |
| Apparatus and method for programmably and flexibly assigning passwords to unlock devices of a computer system intended to remain secure DF Heinrich, HQ Le US Patent 6,460,139, 2002 | 12 | 2002 |
| Buffering digitizer data in a first-in first-out memory RL Hess, GC Teague, PR Cooper, DB Reents, HQ Le US Patent 5,455,907, 1995 | 10 | 1995 |
| Near-optimal control of a bilinear, solar-assisted heat pump system H Le, M Zaheeruddin, V Gourishankar, R Rink | 10 | 1987 |
| Storing data in any of a plurality of buffers in a memory controller HQ Le, TF Emerson, DF Heinrich, RL Noonan US Patent 9,213,545, 2015 | 9 | 2015 |
