Suivre
Liliana Andrade
Liliana Andrade
Univ. Grenoble Alpes, CNRS, Grenoble INP*, TIMA, 38000 Grenoble, France, *Institute of Engineering
Adresse e-mail validée de univ-grenoble-alpes.fr
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Pre-simulation symbolic analysis of synchronization issues between discrete event and timed data flow models of computation
L Andrade, T Maehne, A Vachoux, CB Aoun, F Pêcheux, MM Louërat
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015
25*2015
Overview of the state of the art in embedded machine learning
L Andrade, A Prost-Boucle, F Pétrot
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
162018
Principles and implementation of a generic synchronization interface between SystemC AMS models of computation for the virtual prototyping of multi-disciplinary systems
L Andrade
Université Pierre et Marie Curie-Paris VI, 2016
16*2016
UVM-SystemC-AMS based framework for the correct by construction design of MEMS in their real heterogeneous application context
T Machne, Z Wang, B Vernay, L Andrade, CB Aoun, JP Chaput, ...
2014 21st IEEE International Conference on Electronics, Circuits and Systems …, 2014
152014
Pre-simulation elaboration of heterogeneous systems: The SystemC multi-disciplinary virtual prototyping approach
CB Aoun, L Andrade, T Maehne, F Pêcheux, MM Louërat, A Vachouxy
2015 International Conference on Embedded Computer Systems: Architectures …, 2015
132015
Automation for industry 4.0 by using secure lorawan edge gateways
M Coppola, G Kornaros, L Andrade, F Rousseau
Multi-Processor System-on-Chip 2, 49-66, 2021
82021
Introducción de Open Office
L Andrade, J Carrero
62005
Electronic System Level Design of Heterogeneous Systems: a Motor Speed Control System Case Study
BJ Fernandez-Mesa, L Andrade, F Pétrot
2019 17th IEEE International New Circuits and Systems Conference (NEWCAS), 2019
52019
A Qualitative Approach to Many-core Architecture
BD de Dinechin, L Andrade, F Rousseau
Multi-Processor System-on-Chip 1: Architectures, 27-52, 2021
32021
mMPU: Building a Memristor-Based General-Purpose In-Memory Computation Architecture
A Eliahu, R Ben-Hur, A Haj-Ali, S Kvatinsky, L Andrade, F Rousseau
Multi-Processor System-on-Chip 1 Architectures 6, 119-132, 2021
32021
Time Step Control and Threshold Crossing Detection in SystemC AMS 2.0
L Andrade, T Maehne, MM Louërat, F Pêcheux
Actes du huitieme colloque du GDR SOC-SIP du CNRS, 3, 2013
3*2013
Accurate and Efficient Continuous Time and Discrete Events Simulation in SystemC
B Fernandez-Mesa, L Andrade, F Pétrot
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2020
22020
Overview of the state of the art in embedded machine learning. In 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)
L Andrade, A Prost-Boucle, F Pétrot
IEEE, 2018
22018
Generic eda-standard based elaboration scheme for the efficient monolithic simulation of heterogeneous systems
CB Aoun, L Andrade, T Maehne, F Pêcheux, MM Louërat, A Vachoux
Work-in-progress session at 52th Design Automation Conference (DAC) 2015, 2015
22015
Understanding the heterogeneous hardware: Do not forget the interconnection
L Andrade, CB Aoun, B Vernay, T Maehne, F Pêcheux, MM Louërat
2nd Workshop on Design Automation for Understanding Hardware Designs (DHUDe …, 2015
22015
Power Optimized Wafermap Classification for Semiconductor Process Monitoring
A Pinzari, T Baumela, L Andrade, M Coppola, F Pétrot
Embedded Artificial Intelligence, 1-13, 2023
12023
Simulation of Ideally Switched Circuits in SystemC
BJ Fernandez-Mesa, LLA Porras, F Pétrot
Asia and South Pacific Design Automation Conference (ASP-DAC 2021), 2021
12021
Systèmes multiprocesseurs sur puce 2-Applications
LLA Porras, F Rousseau
ISTE-International Scientific and Technical Encyclopedia, 2023
2023
Systèmes multiprocesseurs sur puce 1-Architectures
LLA Porras, F Rousseau
ISTE-International Scientific and Technical Encyclopedia, 2023
2023
Multi-Processor System-on-Chip: Vol. 1–Architectures
L ANDRADE, F ROUSSEAU
2022
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