| Synetgy: Algorithm-hardware co-design for convnet accelerators on embedded fpgas Y Yang, Q Huang, B Wu, T Zhang, L Ma, G Gambardella, M Blott, ... Proceedings of the 2019 ACM/SIGDA international symposium on field …, 2019 | 132 | 2019 |
| Efficient FPGA implementation of OpenCL high-performance computing applications via high-level synthesis FB Muslim, L Ma, M Roozmeh, L Lavagno IEEE Access 5, 2747-2762, 2017 | 121 | 2017 |
| Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-acceleration Q Huang, C Yarp, S Karandikar, N Pemberton, B Brock, L Ma, G Dai, ... 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 | 20 | 2019 |
| Energy-efficient FPGA Implementation of the k-Nearest Neighbors Algorithm Using OpenCL. FB Muslim, A Demian, L Ma, L Lavagno, A Qamar FedCSIS (Position Papers), 141-145, 2016 | 20 | 2016 |
| Acceleration by inline cache for memory-intensive algorithms on FPGA via high-level synthesis L Ma, L Lavagno, MT Lazarescu, A Arif IEEE Access 5, 18953-18974, 2017 | 16 | 2017 |
| High performance and low power Monte Carlo methods to option pricing models via high level design and synthesis L Ma, FB Muslim, L Lavagno 2016 European Modelling Symposium (EMS), 157-162, 2016 | 12 | 2016 |
| Low power and high performance heterogeneous computing on FPGAs. L Ma Polytechnic University of Turin, Italy, 2019 | 2 | 2019 |
| Synetgy Y Yang, Q Huang, B Wu, T Zhang, L Ma, G Gambardella, M Blott, ... Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019 | 1 | 2019 |
Luciano LavagnoPolitecnico di TorinoVerified email at polito.it
