| Cascade: Connecting rrams to extend analog dataflow in an end-to-end in-memory processing paradigm T Chou, W Tang, J Botimer, Z Zhang Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 83 | 2019 |
| LEIA: A 2.05mm2 140mW lattice encryption instruction accelerator in 40nm CMOS S Song, W Tang, T Chen, Z Zhang 2018 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2018 | 40 | 2018 |
| A 1.8 Gb/s 70.6 pJ/b 128× 16 link-adaptive near-optimal massive MIMO detector in 28nm UTBB-FDSOI W Tang, H Prabhu, L Liu, V Öwall, Z Zhang 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 224-226, 2018 | 36 | 2018 |
| A 0.58mm2 2.76Gb/s 79.8pJ/b 256-QAM massive MIMO message-passing detector W Tang, CH Chen, Z Zhang 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 1-2, 2016 | 25 | 2016 |
| 18.7 A 2.4mm2130mW MMSE-nonbinary-LDPC iterative detector-decoder for 4×4 256-QAM MIMO in 65nm CMOS CH Chen, W Tang, Z Zhang 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 24 | 2015 |
| An 8-bit 20.7 TOPS/W multi-level cell ReRAM-based compute engine JM Correll, L Jie, S Song, S Lee, J Zhu, W Tang, L Wormald, J Erhardt, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 22 | 2022 |
| Design and development of high density fan-out wafer level package (HD-FOWLP) for deep neural network (DNN) chiplet accelerators using advanced interface bus (AIB) MD Rotaru, W Tang, D Rahul, Z Zhang 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 1258-1263, 2021 | 13 | 2021 |
| A 2.4-mm2 130-mW MMSE-Nonbinary LDPC Iterative Detector Decoder for 4 4 256-QAM MIMO in 65-nm CMOS W Tang, CH Chen, Z Zhang IEEE Journal of Solid-State Circuits 54 (7), 2070-2080, 2019 | 7 | 2019 |
| A 0.58-mm2 2.76-Gb/s 79.8-pJ/b 256-QAM Message-Passing Detector for a 128 × 32 Massive MIMO Uplink System W Tang, CH Chen, Z Zhang IEEE Journal of Solid-State Circuits 56 (6), 1722-1731, 2021 | 6 | 2021 |
| NetFlex: A 22nm Multi-Chiplet Perception Accelerator in High-Density Fan-Out Wafer-Level Packaging T Chou, W Tang, MD Rotaru, C Liu, R Dutta, SLP Siang, DHS Wee, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 4 | 2022 |
| PETRA: A 22nm 6.97 TFLOPS/W AIB-Enabled Configurable Matrix and Convolution Accelerator Integrated with an Intel Stratix 10 FPGA SG Cho, W Tang, C Liu, Z Zhang 2021 Symposium on VLSI Circuits, 1-2, 2021 | 3 | 2021 |
| Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm2 AIB 2.0 Interface to Provide Versatile Workload … W Tang, SG Cho, TT Hoang, J Botimer, WQ Zhu, CC Chang, CH Lu, J Zhu, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 1 | 2023 |
| Vota: A heterogeneous multicore visual object tracking accelerator using correlation filters J Zhu, W Tang, CE Lee, H Ye, E McCreath, Z Zhang IEEE Journal of Solid-State Circuits 57 (11), 3490-3502, 2022 | 1 | 2022 |
| VOTA: A 2.45 TFLOPS/W heterogeneous multi-core visual object tracking accelerator based on correlation filters J Zhu, W Tang, CE Lee, H Ye, E McCreath, Z Zhang 2021 Symposium on VLSI Circuits, 1-2, 2021 | 1 | 2021 |
| Design of Detectors and Decoders for MIMO Wireless Systems W Tang | 1 | 2019 |
| Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration W Tang, SG Cho, TT Hoang, J Botimer, WQ Zhu, CC Chang, CH Lu, J Zhu, ... IEEE Journal of Solid-State Circuits, 2023 | | 2023 |
