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Rajagopal Anantharaman
Rajagopal Anantharaman
Dayananda Sagar college of Engineering
Verified email at dayanandasagar.edu - Homepage
Title
Cited by
Cited by
Year
FPGA implementation of Single bit error correction using CRC
A Rajagopal , Pramod S P, Akshay S
International Journal of Computer Applicatioins 52 (10), 15-19, 2012
14*2012
FPGA implementation of Radix-2 FFT processor based on Radix-4 CORDIC
E Joseph, A Rajagopal, K Karibasappa
2012 Nirma University International Conference on Engineering (NUiCONE), 1-6, 2012
82012
Hardware Implementation Analysis of Min-Sum Decoders
R Anantharaman, K Kwadiki, Kerehalli Shankar Rao, Vasundara Patel
Advances in Electrical and Electronic Engineering 17 (2), 179-186, 2019
72019
DSP Implementation of Weil and Sidel'nikov Binary Pseudo Random Noise Codes
D Ajay, KL Sudha, A Rajagopal
2015 IEEE International Conference on Electrical, Computer and Communication …, 2015
62015
Design of SPA decoder for CDMA applications
A Rajagopal, K Karibasappa, KSV Patel
2017 International Conference on Intelligent Computing and Control (I2C2), 1-6, 2017
42017
FPGA Implementation of Pseudo Noise Sequences based on Quadratic Residue Theory
A. Rajagopal, K.L. Sudha, Dundi Ajay
International Journal of Computer Application 134 (09), 2016
4*2016
Utilization of Spectrum holes for image transmission using LabVIEW on NI USRP
A Aziz, R A., A Adithya
2018 International Conference on Networking, Embedded and Wireless Systems …, 2018
32018
Hardware implementation of a modified SSD LDPC decoder
A Rajagopal, K Karibasappa, KSV Patel
International Journal of Computer Aided Engineering and Technology 14 (3 …, 2021
12021
Study of LDPC decoders with quadratic residue sequence for communication system
A Rajagopal, K Karibasappa, PKS Vasundara
International Journal of Information and Computer Security 13 (1), 18-31, 2020
12020
FPGA Implementation of logarithm of a number to base 2
A Rajagopal, K Karibasappa, KSV Patel
2017 International Conference on Innovative Mechanisms for Industry …, 2017
12017
Authentication System Based On Ldpc And Sha-3
BV Sheetal, A Rajagopal
2022 Sixth International Conference on I-SMAC (IoT in Social, Mobile …, 2022
2022
FPGA Implementation of decoders for Polar Codes
A Rajagopal, R Likith, SV Sairam, G Naimisha, N Nabiha
Journal of Electrical and Electronics Engineering 15 (2), 70-75, 2022
2022
Implementation of Digital Communication System Using Weil Sequence for Efficient Information Transmission
Rajagopal A, Ayush Singh, Angushlekha Bora, Kritka Singhal
International Conference on Smart Data Intelligence (ICSMDI 2021), 2021
2021
Application of Histogram of Oriented Gradients and Local Binary Pattern in Automatic Waste Management Bins
A Rajagopal, A Chandru, A Aziz
2020 Second International Conference on Inventive Research in Computing …, 2020
2020
FPGA IMPLEMENTATION OF SSPA DECODER
A Rajagopal, K Karibasappa, KSV Patel
IJME (ICTACT Journal of Microelectronics) 4 (Issue-03), 2018
2018
Year of Publication: 2016
A Rajagopal, KL Sudha, D Ajay
2016
FPGA Implementation of Pseudo Noise Sequence using chaotic tent map for satellite communication
Sudha K.L, Rajagopal A, Dundi Ajay
IJME (ICTACT Journal of Microelectronics) 1 (04), 155-159, 2016
2016
FPGA implementation of WSLCE sequence for GNSS applications
Rajagopal A., A Hariharasudhan, KL Sudha
2015 International Conference on Computers, Communications, and Systems …, 2015
2015
Building automation & security using can and IoT
Rajeev Halemani, Rajagopal A .
iCATccT-2015, 2015
2015
FPGA implementation of Modified Turbo encoder
Rajagopal .A , Karibasappa . K, Vasundara Patel K.S
International journal of computer applications 116 (6), 27-29, 2015
2015
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