A tissue impedance measurement chip for myocardial ischemia detection A Yúfera, A Rueda, JM Muñoz, R Doldán, G Leger, ... IEEE Transactions on Circuits and Systems I: Regular Papers 52 (12), 2620-2628, 2005 | 132 | 2005 |
Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs G Léger, EJ Peralías, A Rueda, JL Huertas IEEE Transactions on Circuits and Systems I: Regular Papers 51 (1), 140-150, 2004 | 50 | 2004 |
Efficient selection of signatures for analog/RF alternate test MJ Barragan, G Leger 2013 18th IEEE European Test Symposium (ETS), 1-6, 2013 | 48 | 2013 |
On-chip evaluation of oscillation-based-test output signals for switched-capacitor circuits D Vázquez, G Huertas, G Leger, E Peralías, A Rueda, JL Huertas Analog Integrated Circuits and Signal Processing 33, 201-211, 2002 | 46 | 2002 |
Alternate test of LNAs through ensemble learning of on-chip digital envelope signatures MJ Barragán, R Fiorelli, G Leger, A Rueda, JL Huertas Journal of Electronic Testing 27, 277-288, 2011 | 44 | 2011 |
A procedure for alternate test feature design and selection MJ Barragan, G Leger IEEE Design & Test 32 (1), 18-25, 2014 | 38 | 2014 |
On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications MJ Barragan, G Leger, D Vazquez, A Rueda Analog Integrated Circuits and Signal Processing 82, 67-79, 2015 | 36 | 2015 |
An integrated circuit for tissue impedance measure A Yufera, G Leger, EO Rodriguez-Villegas, JM Muñoz, A Rueda, A Ivorra, ... 2nd Annual International IEEE-EMBS Special Topic Conference on …, 2002 | 33 | 2002 |
Low-Cost Digital Detection of Parametric Faults in Cascaded Modulators G Leger, A Rueda IEEE Transactions on Circuits and Systems I: Regular Papers 56 (7), 1326-1338, 2008 | 26 | 2008 |
Improving the accuracy of RF alternate test using multi-VDD conditions: application to envelope-based test of LNAs MJ Barragan, R Fiorelli, G Leger, A Rueda, JL Huertas 2011 Asian Test Symposium, 359-364, 2011 | 23 | 2011 |
Brownian distance correlation-directed search: A fast feature selection technique for alternate test G Leger, MJ Barragan Integration 55, 401-414, 2016 | 22 | 2016 |
Design trade-offs for on-chip driving of high-speed high-performance ADCs in static BIST applications AJ Gines, E Peralias, G Leger, A Rueda, G Renaud, MJ Barragan, S Mir 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW), 1-6, 2016 | 21 | 2016 |
On Chopper Effects in Discrete-TimeModulators G Léger, AJG Arteaga, EJP Macías, A Rueda IEEE Transactions on Circuits and Systems I: Regular Papers 57 (9), 2438-2449, 2010 | 20 | 2010 |
Digital test for the extraction of integrator leakage in first-and second-order ΣΔ modulators G Leger, A Rueda IEE Proceedings-Circuits, Devices and Systems 151 (4), 349-358, 2004 | 20 | 2004 |
Assessing AMS-RF test quality by defect simulation VG Gil, AJG Arteaga, G Leger IEEE Transactions on Device and Materials Reliability 19 (1), 55-63, 2019 | 18 | 2019 |
Sine-wave signal characterization using square-wave and ΣΔ-modulation: application to mixed-signal BIST D Vázquez, G Huertas, Á Luque, MJ Barragán, G Leger, A Rueda, ... Journal of Electronic Testing 21, 221-232, 2005 | 17 | 2005 |
A method for parameter extraction of analogue sine-wave signals for mixed-signal built-in-self-test applications D Vázquez, G Leger, G Huertas, A Rueda, JL Huertas Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 15 | 2004 |
Practical solutions for the application of the oscillation-based-test in analog integrated circuits D Vázquez, G Huertas, G Leger, A Rueda, JL Huertas 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat …, 2002 | 14 | 2002 |
Practical solutions for the application of the oscillation-based-test: Start-up and on-chip evaluation D Vázquez, G Huertas, G Leger, A Rueda, JL Huertas Proceedings 20th IEEE VLSI Test Symposium (VTS 2002), 433-438, 2002 | 14 | 2002 |
Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator AJ Ginés, E Peralias, G Leger, A Rueda, G Renaud, MJ Barragan, S Mir 2016 21th IEEE European Test Symposium (ETS), 1-6, 2016 | 13 | 2016 |