| 2018 IEEE Int. Electron Devices Meeting (IEDM) Z Wang, B Crafton, J Gomez, R Xu, A Luo, Z Krivokapic, L Martin, S Datta, ... IEEE 13, 1, 2018 | 345 | 2018 |
| Design of high speed low power multiplier using reversible logic: A vedic mathematical approach TR Rakshith, R Saligram 2013 International Conference on Circuits, Power and Computing Technologies …, 2013 | 78 | 2013 |
| Design of high speed low power multiplier using reversible logic: A vedic mathematical approach TR Rakshith, R Saligram 2013 International Conference on Circuits, Power and Computing Technologies …, 2013 | 78 | 2013 |
| Novel code converter employing reversible logic R Saligram, TR Rakshith International Journal of Computer Applications 52 (18), 2012 | 39 | 2012 |
| Optimized reversible vedic multipliers for high speed low power operations R Saligram, TR Rakshith 2013 IEEE Conference on Information & Communication Technologies, 809-814, 2013 | 34 | 2013 |
| Design of Reversible Multipliers for linear filtering Applications in DSP R Saligram, TR Rakshith International Journal of VLSI Design and Communication systems, Dec-12, 2012 | 34 | 2012 |
| CryoMem: A 4K-300K 1.3GHz eDRAM Macro with Hybrid 2T-Gain-Cell in a 28nm Logic Process for Cryogenic Applications R Saligram, S Datta, A Raychowdhury Custom Integrated Circuits Conference (CICC-2021), 2021 | 26 | 2021 |
| Design of parity preserving logic based fault tolerant reversible arithmetic logic unit R Saligram, SS Hegde, SA Kulkarni, HR Bhagyalakshmi, MK Venkatesha arXiv preprint arXiv:1307.3690, 2013 | 22 | 2013 |
| Parity preserving logic based fault tolerant reversible ALU TR Rakshith, R Saligram 2013 IEEE Conference on Information & Communication Technologies, 485-490, 2013 | 19 | 2013 |
| Design of fault tolerant reversible multiplexer based multi-boolean function generator using parity preserving gates R Saligram, SS Hegde, SA Kulkarni, HR Bhagyalakshmi, MK Venkatesha International Journal of Computer Applications 66 (19), 2013 | 18 | 2013 |
| Characterization and modeling of 22 nm FDSOI cryogenic RF CMOS W Chakraborty, KA Aabrar, J Gomez, R Saligram, A Raychowdhury, P Fay, ... IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 7 …, 2021 | 16 | 2021 |
| A 64-Bit Arm CPU at Cryogenic temperatures: Design Technology Co-Optimization for Power and Performance R Saligram, D Prasad, D Pietromonaco, A Raychowhdhury, B Cline Custom Integrated Circuits Conference (CICC-2021), 2021 | 15 | 2021 |
| Cryogenic RF CMOS on 22nm FDSOI Platform with Record fT=495GHz and fMAX=497GHz W Chakraborty, K Aabrar, J Gomez, R Saligram, A Raychowdhury, P Fay, ... 2021 IEEE Symposium on VLSI Technology, 2021 | 12 | 2021 |
| Design of low logical cost adders using novel parity conserving toffoli gate R Saligram, TR Rakshith 2013 International Conference on Emerging Trends in Communication, Control …, 2013 | 12 | 2013 |
| Scaled back end of line interconnects at cryogenic temperatures R Saligram, S Datta, A Raychowdhury IEEE Electron Device Letters 42 (11), 1674-1677, 2021 | 10 | 2021 |
| Pseudo-static 1T capacitorless DRAM using 22nm FDSOI for cryogenic cache memory W Chakraborty, R Saligram, A Gupta, M San Jose, KA Aabrar, S Dutta, ... 2021 IEEE International Electron Devices Meeting (IEDM), 40.1. 1-40.1. 4, 2021 | 8 | 2021 |
| Power performance analysis of digital standard cells for 28 nm bulk CMOS at cryogenic temperature using BSIM models R Saligram, W Chakraborty, N Cao, Y Cao, S Datta, A Raychowdhury IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 7 …, 2021 | 8 | 2021 |
| Contemplation of synchronous Gray Code counter and its variants using reversible logic gates R Saligram, TR Rakshith 2013 IEEE Conference on Information & Communication Technologies, 661-665, 2013 | 8 | 2013 |
| Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing W Chakraborty, P Shrestha, A Gupta, R Saligram, S Spetalnick, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 7 | 2022 |
| Wireless computing in medicine: from nano to cloud with ethical and legal implications MM Eshaghian-Wilner John Wiley & Sons, 2016 | 6 | 2016 |
Arijit RaychowdhurySteve W. Chaddick School Chair for ECE, Georgia Institute of TechnologyVerified email at ece.gatech.edu
