Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using 3D-TCAD simulation N Vinodhkumar, YV Bhuvaneshwari, KK Nagarajan, R Srinivasan Microelectronics Reliability 55 (12), 2647-2653, 2015 | 13 | 2015 |
Radiation performance of planar junctionless devices and junctionless SRAMs N Vinodhkumar, R Srinivasan Journal of Computational Electronics 15, 61-66, 2016 | 8 | 2016 |
Optimization of Bulk Planar Junctionless Transistor using Work function, Device layer thickness and Channel doping concentration with OFF Current constraint I Jenifer, N Vinodhkumar, R Srinivasan 2016 Online International Conference on Green Engineering and Technologies …, 2016 | 7 | 2016 |
Phase displacement study in MOSFET based ring VCOs due to heavy-ion irradiation using 3D-TCAD and circuit simulation M Ponnambalam, N Vinodhkumar, R Srinivasan, PV Chandramani Microelectronics Reliability 65, 27-34, 2016 | 4 | 2016 |
Performance enhancement of junctionless silicon nanotube FETs using gate and dielectric engineering SP Scarlet, N Vinodhkumar, R Srinivasan Journal of Computational Electronics 20, 209-217, 2021 | 2 | 2021 |
Study of Single Event Upsets in different double gate FinFET based SRAM topologies K Srikanth, N Vinodhkumar, KK Nagarajan, R Srinivasan 2013 IEEE International Conference ON Emerging Trends in Computing …, 2013 | 2 | 2013 |
Effect of underlap on 30 nm Gate Length FinFET based LNA using TCAD Simulations KK Nagarajan, N Vinodhkumar, R Srinivasan International Conference on VLSI, Communication & Instrumentation (ICVCI), 2011 | 2 | 2011 |
Noise characterisation of GaN current aperture vertical electron transistor metal‐insulated semiconductor field effect transistor with Δ‐shaped gate for low noise radio … V Janakiraman, A Mohanbabu, S Maheswari, A Daniel Raj, S Deb, ... International Journal of RF and Microwave Computer‐Aided Engineering 32 (11 …, 2022 | 1 | 2022 |
Numerical study on SEU performance of strain engineered 6T-SRAM cells N Vinodhkumar, G Durga, S Muthumanickam Journal of Circuits, Systems and Computers 31 (02), 2250034, 2022 | 1 | 2022 |
SET and SEU performance of single, double, triple and quadruple-gate junctionlessFETs using numerical simulations N Vinodhkumar, R Srinivasan Microelectronics journal 67, 38-42, 2017 | 1 | 2017 |
Optimization of Gate–Source/Drain Underlap on 30 nm Gate Length FinFET Based LNA Using TCAD Simulations KK Nagarajan, N Vinodhkumar, R Srinivasan WSEAS Transactions on Circuits and Systems 11, 2012 | 1 | 2012 |
E‐Mode‐Operated Advanced III‐V Heterostructure Quantum Well Devices for Analog/RF and High‐Power Switching Applications A Mohanbabu, N Vinodhkumar, S Maheswari, S Baskaran, ... Nanodevices for Integrated Circuit Design, 117-141, 2023 | | 2023 |
Performance Analysis of Gray to Binary Code Converter Using GDI Techniques N Vinodhkumar, MG Rajendrakumar, S Muthumanickam Proceedings of the 2nd International Conference on Recent Trends in Machine …, 2022 | | 2022 |
Effect of Underlap on Input Impedance, Gain and Noise Figure in FinFET Based LNA N Vinodhkumar, KK Nagarajan, R Srinivasan Digital Signal Processing, 133-136, 2010 | | 2010 |