| Architecture for Adaptive Rood Pattern Search Algorithm for Motion Estimation KL Bhavani, R Trinadh International Journal of Engineering Research and Technology 1 (8), 1-6, 2012 | 5 | 2012 |
| Efficient Design of Rounding‑Based Approximate Multiplier Using Modified Karatsuba Algorithm RT E.Jagadeeswara Rao, K.Tarakeswara Rao, K.Sudha Ramya, D.Ajay Kumar Journal of Electronic Testing, 567–574 (2022), 2022 | 3* | 2022 |
| A Low Power New Data Compression Algorithm For Wire/Wireless Sensor Networks using KRLE V Krishnan, MR Trinadh International Journal of Electronics Signals and Systems (IJESS) 3 (2), 81-87, 2013 | 3 | 2013 |
| Efficient Design of Rounding‑Based Approximate Multiplier Using Modified Karatsuba Algorithm RT E.Jagadeeswara Rao, K.Tarakeswara Rao, K.Sudha Ramya, D.Ajay Kumar Journal of Electronic Testing, 567–574 (2022), 2022 | | 2022 |
| Review Of Mems-Based Sensing Technology And Human-Centered Applications In Health Prespective M Katta, T Rajanala, L Nadella, MVK Allu, P Sowmithri NVEO-NATURAL VOLATILES & ESSENTIAL OILS Journal| NVEO, 4299-4315, 2021 | | 2021 |
| Simulation and Comparison of Multiple Encryption Standard Algorithms TGK R.Trinadh, S.Sujith Kumar, V.Raveendra, V.Ravi Teja, U.Avinash National Conference on Artificial Intelligence & Machine Learning 1 (1), 4, 2021 | | 2021 |
| Design and Area Optimization of 1KB Memory using 45nm CMOS 6T SRAM Cell RT S.V.Sirisha The International journal of analytical and experimental modal analysis 12 …, 2020 | | 2020 |
| Design of Power Efficient Approximate Multipliers CR R.Trinadh International Conference on Advanced Communications & Technology 1 (1), 4, 2019 | | 2019 |
| FOLDED ARCHITECTURE BASED CARRYSKIP ADDER FOR M BIT RT P.Murali Babu Journal of Emerging Technologies and Innovative Research 5 (12), 128-133, 2018 | | 2018 |
| Exploiting Rising and Charge-Sharing Voltage for Power Management High Speed Domino Circuits R Trinadh International Journal on Electronics & Communication Technology 5 (3), 2014 | | 2014 |
| A Novel Design Of Area And Power Efficient High Speed Data Path Logic System RT T.Venkata Lakshmi International Conference on Systemics, Cybernetics and Informatics, 2014 | | 2014 |
| A DESIGN OF AREA AND POWER EFFICIENT HIGH SPEED DATA PATH LOGIC SYSTEM R Trinadh International Journal of Electrical and Electronics Engineering 3 (2), 2013 | | 2013 |
| Enhanced feature sets for face recognition under difficult lighting conditions R Trinadh International Conference on Nanoscience Engineering & Advanced computing 1 …, 2011 | | 2011 |
| a. Design and development of smart energy meter for effective use of electricity in IoT applications, 2018 P Gopi Krishna, K Sreenivasa Ravi, R Trinadh, K Chandra Sekhar, ... International Journal of Engineering and Technology (UAE) 7 (2), 115-119, 0 | | |
| A low power new data compression for wire/wireless sensors network using K-RLE V KRISHNAN, MRR TRINADH International Journal of Electronics Signals and Systems (IJESS), ISSN, 2231 …, 0 | | |
| WIRE/WIRELESS SENSOR NETWORKS USING K-RLE ALGORITHM FOR A LOW POWER DATA COMPRESSION V KRISHNAN, MRR TRINADH | | |
