| VLSI architectures for video compression-a survey P Pirsch, N Demassieux, W Gehrke Proceedings of the IEEE 83 (2), 220-246, 1995 | 463 | 1995 |
| A one chip VLSI for real time two-dimensional discrete cosine transform A Artieri, S Kritter, F Jutand, N Demassieux 1988., IEEE International Symposium on Circuits and Systems, 701-704, 1988 | 42 | 1988 |
| VLSI architecture for a one chip video median filter N Demassieux, F Jutand, M Saint-Paul, M Dana ICASSP'85. IEEE International Conference on Acoustics, Speech, and Signal …, 1985 | 37 | 1985 |
| A single chip video rate 16× 16 discrete cosine transform F Jutand, N Demassieux, G Concordel, J Guichard, E Cassimatis ICASSP'86. IEEE International Conference on Acoustics, Speech, and Signal …, 1986 | 34 | 1986 |
| An optimized VLSI architecture for a multiformat discrete cosine transform N Demassieux, G Concordel, J Durandeau, F Jutand ICASSP'87. IEEE International Conference on Acoustics, Speech, and Signal …, 1987 | 27 | 1987 |
| High speed low power architecture for memory management in a Viterbi decoder E Boutillon, N Demassieux 1996 IEEE International Symposium on Circuits and Systems. Circuits and …, 1996 | 25 | 1996 |
| Optimal VLSI architecture for distributed arithmetic-based algorithms K Nourji, N Demassieux Proceedings of ICASSP'94. IEEE International Conference on Acoustics, Speech …, 1994 | 18 | 1994 |
| A 10 MHz (255, 223) Reed-Solomon decoder N Demassieux, F Jutand, M Muller Proceedings of the IEEE 1988 Custom Integrated Circuits Conference, 17.6/1 …, 1988 | 16 | 1988 |
| A 13.5 MHz single chip multiformat discrete cosine transform F Jutand, N Demassieux, M Dana, JP Durandeau, G Concordel, A Artieri, ... Visual Communications and Image Processing II 845, 6-12, 1987 | 16 | 1987 |
| DCT architectures for HDTV F Jutand, ZJ Mou, N Demassieux 1991., IEEE International Sympoisum on Circuits and Systems, 196-199, 1991 | 15 | 1991 |
| A versatile architecture for VLSI implementation of the Viterbi algorithm BK Min, N Demassieux [Proceedings] ICASSP 91: 1991 International Conference on Acoustics, Speech …, 1991 | 15 | 1991 |
| Binary adder having a fixed operand and parallel-serial binary multiplier incorporating such an adder F Jutand, N Demassieux, M Dana US Patent 4,853,887, 1989 | 15 | 1989 |
| A VLSI one chip for real time two-dimensional discrete cosine transform A Artieri, E Macoviak, F Jutand, N Demassieux Proc. IEEE Int. Symp. Circuits Syst., 1988 | 15 | 1988 |
| Distributed architecture for data acquisition: a generic model J Ehrlich, A Zerrouki, N Demassieux IEEE Instrumentation and Measurement Technology Conference Sensing …, 1997 | 11 | 1997 |
| A generalized precompiling scheme for surviving path memory management in Viterbi decoders E Boutillon, N Demassieux 1993 IEEE International Symposium on Circuits and Systems, 1579-1582, 1993 | 11 | 1993 |
| Orthogonal transforms N Demassieux, F Jutand Advances in Image Communication 2, 217-250, 1993 | 11 | 1993 |
| A VLSI architecture for real-time image convolution with large symmetric kernels N Demassieux, F Jutand, M Bernard, C Joanblanq ICASSP-88., International Conference on Acoustics, Speech, and Signal …, 1988 | 10 | 1988 |
| Optimization of real-time VLSI architectures for distributed arithmetic-based algorithms: application to HDTV filters K Nourji, N Demassieux Proceedings of IEEE International Symposium on Circuits and Systems-ISCAS'94 …, 1994 | 9 | 1994 |
| VLSI architectures for dynamic time warping using systolic arrays F Jutand, N Demassieux, D Vicard, G Chollet ICASSP'84. IEEE International Conference on Acoustics, Speech, and Signal …, 1984 | 9 | 1984 |
| A new VLSI architecture for large kernel real time convolution F Jutand, N Demassieux, A Artieri International Conference on Acoustics, Speech, and Signal Processing, 921-924, 1990 | 8 | 1990 |
