| Reconfiguration of Embedded Accelerators by Microprogramming for Intensive Loop Computations S Yousefzadeh, K Basharkhah, N Nosrati, M Rajabalipanah, SM Ghasemi, ... 2020 23rd International Symposium on Design and Diagnostics of Electronic …, 2020 | 3 | 2020 |
| An Accelerator-based Architecture Utilizing an Efficient Memory Link for Modern Computational Requirements S Yousefzadeh, K Basharkhah, N Nosrati, R Sadeghi, J Raik, M Jenihhin, ... 2019 IEEE East-West Design & Test Symposium (EWDTS), 1-6, 2019 | 2 | 2019 |
| Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms SA Mirsalari, S Yousefzadeh, G Tagliavini, D Stathis, A Hemani 2023 30th IEEE International Conference on Electronics, Circuits and Systems …, 2023 | | 2023 |
| Reducing DFT hardware overhead by use of a test microprogram in a microprogrammed hardware accelerator M Rajabalipanah, SM Ghasemi, N Nosrati, K Basharkhah, S Yousefzadeh, ... 2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2020 | | 2020 |
| Nicolo Maunero, Paolo Prinetto, Gianluca Roascio SA Farsani, K Basharkhah, A Mohaghegh, Z Navabi, S Boutobza, A Costa, ... | | |
