Decorating surfaces with bidirectional texture functions K Zhou, P Du, L Wang, Y Matsushita, J Shi, B Guo, HY Shum IEEE Transactions on Visualization and Computer Graphics 11 (5), 519-528, 2005 | 43 | 2005 |
Worst-case noise prediction with non-zero current transition times for early power distribution system verification P Du, X Hu, SH Weng, A Shayan, X Chen, AE Engin, CK Cheng 2010 11th International Symposium on Quality Electronic Design (ISQED), 624-631, 2010 | 23 | 2010 |
Character design and stamp algorithms for character projection electron-beam lithography P Du, W Zhao, SH Weng, CK Cheng, R Graham 17th Asia and South Pacific Design Automation Conference, 725-730, 2012 | 16 | 2012 |
Exploring the rogue wave phenomenon in 3D power distribution networks X Hu, P Du, CK Cheng 19th Topical Meeting on Electrical Performance of Electronic Packaging and …, 2010 | 16 | 2010 |
An adaptive parallel flow for power distribution network simulation using discrete Fourier transform X Hu, W Zhao, P Du, A Shayan, CK Cheng 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 125-130, 2010 | 14 | 2010 |
Modeling and analysis of power distribution networks in 3-D ICs X Hu, P Du, JF Buckwalter, CK Cheng IEEE transactions on very large scale integration (VLSI) systems 21 (2), 354-366, 2012 | 13 | 2012 |
More realistic power grid verification based on hierarchical current and power constraints CK Cheng, P Du, AB Kahng, GKH Pang, Y Wang, N Wong Proceedings of the 2011 international symposium on Physical design, 159-166, 2011 | 13 | 2011 |
On the bound of time-domain power supply noise based on frequency-domain target impedance X Hu, W Zhao, P Du, Y Zhang, A Shayan, C Pan, AE Egin, CK Cheng Proceedings of the 11th international workshop on System level interconnect …, 2009 | 11 | 2009 |
A fast and stable explicit integration method by matrix exponential operator for large scale circuit simulation SH Weng, P Du, CK Cheng 2011 IEEE International Symposium of Circuits and Systems (ISCAS), 1467-1470, 2011 | 8 | 2011 |
Power grid sizing via convex programming P Du, SH Weng, X Hu, CK Cheng 2011 9th IEEE International Conference on ASIC, 337-340, 2011 | 5 | 2011 |
Low-power gated bus synthesis for 3D IC via rectilinear shortest-path steiner graph CK Cheng, P Du, AB Kahng, SH Weng Proceedings of the 2012 ACM international symposium on International …, 2012 | 2 | 2012 |
Exploring 3d power distribution network physics X Hu, P Du, CK Cheng 2011 9th IEEE International Conference on ASIC, 562-565, 2011 | 2 | 2011 |
Corrigendum to “A Realistic Early-Stage Power Grid Verification Algorithm Based on Hierarchical Constraints” Y Wang, X Hu, CK Cheng, GKH Pang, N Wong, P Du, AB Kahng IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 1 | 2012 |
Worst Case Noise Prediction With Nonzero Current Transition Times for Power Grid Planning X Hu, P Du, SH Weng, CK Cheng IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (3), 607-620, 2013 | | 2013 |
A Realistic Early-Stage Power Grid Verification Algorithm Based on Hierarchical Constraints (vol 31, pg 109, 2012) CK Cheng, P Du, X Hu, AB Kahng, GKH Pang, Y Wang, N Wong IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND …, 2012 | | 2012 |
Power network verication and optimization at planning stages P Du UC San Diego, 2012 | | 2012 |