| Circuitized structure with 3-dimensional configuration S Dragone, SS Oggioni, WS Fernandez US Patent 10,426,037, 2019 | 216 | 2019 |
| Method and device for synchronizing a processor and a coprocessor A Doering, S Dragone US Patent App. 10/924,185, 2005 | 52 | 2005 |
| System for using FPGA technology with a microprocessor for reconfigurable, instruction level hardware acceleration AC Doering, S Dragone, A Herkersdorf, RG Hofmann, CE Kuhlmann US Patent 7,584,345, 2009 | 47 | 2009 |
| Tamper-respondent assemblies with enclosure-to-board protection WL Brodsky, JA Busby, EN Cohen, S Dragone, MJ Fisher, DC Long, ... US Patent 9,554,477, 2017 | 40 | 2017 |
| IBM 4765 cryptographic coprocessor TW Arnold, C Buscaglia, F Chan, V Condorelli, J Dayka, ... IBM Journal of Research and Development 56 (1.2), 10: 1-10: 13, 2012 | 36 | 2012 |
| Tamper-respondent assemblies with enclosure-to-board protection WL Brodsky, JA Busby, EN Cohen, S Dragone, MJ Fisher, DC Long, ... US Patent 9,661,747, 2017 | 34 | 2017 |
| Circuit boards and electronic packages with embedded tamper-respondent sensor WL Brodsky, S Dragone, RS Krabbenhoft, DC Long, SS Oggioni, ... US Patent 10,175,064, 2019 | 31 | 2019 |
| Circuit boards and electronic packages with embedded tamper-respondent sensor WL Brodsky, S Dragone, RS Krabbenhoft, DC Long, SS Oggioni, ... US Patent 10,168,185, 2019 | 30 | 2019 |
| Tamper-proof electronic packages formed with stressed glass JA Busby, S Dragone, MJ Fisher, MA Gaynes, DC Long, KP Rodbell, ... US Patent 9,913,370, 2018 | 28 | 2018 |
| Tamper-proof electronic packages with stressed glass component substrate (s) JA Busby, S Dragone, MA Gaynes, KP Rodbell, W Santiago-Fernandez US Patent 9,881,880, 2018 | 26 | 2018 |
| Tamper-respondent assemblies with enclosure-to-board protection WL Brodsky, JA Busby, EN Cohen, S Dragone, MJ Fisher, DC Long, ... US Patent 9,877,383, 2018 | 23 | 2018 |
| Coupling GP processor with reserved instruction interface via coprocessor port with operation data flow to application specific ISA processor with translation pre-decoder AC Doering, S Dragone US Patent 7,293,159, 2007 | 23 | 2007 |
| Tamper-respondent assembly with sensor connection adapter S Dragone, SS Oggioni, W Santiago-Fernandez US Patent 10,321,589, 2019 | 20 | 2019 |
| Vented tamper-respondent assemblies S Dragone, SS Oggioni, W Santiago-Fernandez US Patent 10,299,372, 2019 | 18 | 2019 |
| Using field programmable gate array (FPGA) technology with a microprocessor for reconfigurable, instruction level hardware acceleration AC Doering, S Dragone, A Herkersdorf, RG Hofmann, CE Kuhlmann US Patent 7,603,540, 2009 | 18 | 2009 |
| Configurable integrated tamper detection circuitry V Condorelli, S Dragone, T Visegrady US Patent 8,613,111, 2013 | 17 | 2013 |
| Tamper-respondent assemblies with in situ vent structure (s) S Dragone, SS Oggioni, W Santiago-Fernandez US Patent 10,271,424, 2019 | 14 | 2019 |
| Tamper-respondent assemblies with enclosure-to-board protection WL Brodsky, JA Busby, EN Cohen, S Dragone, MJ Fisher, DC Long, ... US Patent 10,172,232, 2019 | 14 | 2019 |
| Tamper-respondent assembly with flexible tamper-detect sensor (s) overlying in-situ-formed tamper-detect sensor WL Brodsky, JA Busby, JR Dangler, S Dragone, MJ Fisher, DC Long US Patent 10,327,329, 2019 | 13 | 2019 |
| Tamper-proof electronic packages with stressed glass component substrate (s) JA Busby, S Dragone, MA Gaynes, KP Rodbell, W Santiago-Fernandez US Patent 10,177,102, 2019 | 12 | 2019 |
