| A metastability-based true random number generator on FPGA C Li, Q Wang, J Jiang, N Guan 2017 IEEE 12th international conference on ASIC (ASICON), 738-741, 2017 | 29 | 2017 |
| Design and implementation of flexible dual-mode soft-output MIMO detector with channel preprocessing Z Yan, G He, Y Ren, W He, J Jiang, Z Mao IEEE Transactions on Circuits and Systems I: Regular Papers 62 (11), 2706-2717, 2015 | 29 | 2015 |
| Ship detection based on fused features and rebuilt YOLOv3 networks in optical remote-sensing images Q Wang, F Shen, L Cheng, J Jiang, G He, W Sheng, N Jing, Z Mao International Journal of Remote Sensing 42 (2), 520-536, 2021 | 28 | 2021 |
| Priority branches for ship detection in optical remote sensing images Y Zhang, W Sheng, J Jiang, N Jing, Q Wang, Z Mao Remote Sensing 12 (7), 1196, 2020 | 22 | 2020 |
| A new cellular-based redundant TSV structure for clustered faults Q Wang, Z Liu, J Jiang, N Jing, W Sheng IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (2), 458-467, 2018 | 20 | 2018 |
| A new full adder design for tree structured arithmetic circuits JF Jiang, ZG Mao, WF He, Q Wang 2010 2nd International Conference on Computer Engineering and Technology 4 …, 2010 | 17 | 2010 |
| An efficient massive MIMO detector based on second-order Richardson iteration: From algorithm to flexible architecture J Tu, M Lou, J Jiang, D Shu, G He IEEE Transactions on Circuits and Systems I: Regular Papers 67 (11), 4015-4028, 2020 | 16 | 2020 |
| Pareto optimal temporal partition methodology for reconfigurable architectures based on multi-objective genetic algorithm W Sheng, W He, J Jiang, Z Mao 2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012 | 14 | 2012 |
| An FPGA based heterogeneous accelerator for single shot multibox detector (SSD) L Cai, F Dong, K Chen, K Yu, W Qu, J Jiang 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit …, 2020 | 12 | 2020 |
| A self-timed ring based true random number generator on FPGA Y Zhang, J Jiang, Q Wang, N Guan 2018 14th IEEE International Conference on Solid-State and Integrated …, 2018 | 10 | 2018 |
| Modeling and analysis of signal transmission with Through Silicon Via (TSV) noise coupling Z Chen, Q Wang, J Xie, J Tian, J Jiang, Y Li, W Yin 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2646-2649, 2013 | 10 | 2013 |
| An efficient CNN accelerator using inter-frame data reuse of videos on FPGAs S Li, Q Wang, J Jiang, W Sheng, N Jing, Z Mao IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (11 …, 2022 | 8 | 2022 |
| A new approximate multiplier design for digital signal processing Y Zhao, T Li, F Dong, Q Wang, W He, J Jiang 2019 IEEE 13th international conference on ASIC (ASICON), 1-4, 2019 | 8 | 2019 |
| A rapid scrubbing technique for SEU mitigation on SRAM-based FPGAs S Zheng, H You, G He, Q Wang, T Si, J Jiang, J Jin, N Jing 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 8 | 2019 |
| A novel low power 64-kb SRAM using bit-lines charge-recycling and non-uniform cell scheme X Wang, J Jiang, Z Mao, B Ge, X Zhao 2011 18th IEEE International Conference on Electronics, Circuits, and …, 2011 | 8 | 2011 |
| A reschedulable dataflow-simd execution for increased utilization in cgra cross-domain acceleration C Yin, N Jing, J Jiang, Q Wang, Z Mao IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 7 | 2022 |
| Design of a high voltage stimulator chip for a stroke rehabilitation system L Zeng, X Yi, S Lu, Y Lou, J Jiang, H Qu, N Lan, G Wang 2013 35th annual international conference of the IEEE engineering in …, 2013 | 7 | 2013 |
| A CPU-FPGA heterogeneous acceleration system for scene text detection network J Jiang, M Jiang, J Zhang, F Dong IEEE Transactions on Circuits and Systems II: Express Briefs 69 (6), 2947-2951, 2022 | 6 | 2022 |
| Subgraph decoupling and rescheduling for increased utilization in CGRA architecture C Yin, Q Wang, J Jiang, W Sheng, G He, Z Mao, N Jing 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 6 | 2021 |
| Parallel SER analysis for combinational and sequential standard cell circuits W Sheng, J Jiang, Z Mao Microelectronics journal 50, 8-19, 2016 | 6 | 2016 |
