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Vladimir Dimić
Vladimir Dimić
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Runtime-assisted shared cache insertion policies based on re-reference intervals
V Dimić, M Moretó, M Casas, M Valero
Euro-Par 2017: Parallel Processing: 23rd International Conference on …, 2017
92017
Rich: implementing reductions in the cache hierarchy
V Dimić, M Moretó, M Casas, J Ciesko, M Valero
Proceedings of the 34th ACM International Conference on Supercomputing, 1-13, 2020
62020
PrioRAT: Criticality-Driven Prioritization Inside the On-Chip Memory Hierarchy
V Dimić, M Moretó, M Casas, M Valero
European Conference on Parallel Processing, 599-615, 2021
12021
Runtime-assisted optimizations in the on-chip memory hierarchy
V Dimić
Universitat Politècnica de Catalunya, 2020
2020
Runtime assisted cache memory optimizations
V Dimic
Universitat Politècnica de Catalunya, 2015
2015
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Articles 1–5