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Sukarn Agarwal
Sukarn Agarwal
Assistant Professor, IIT Mandi
Verified email at iitmandi.ac.in - Homepage
Title
Cited by
Cited by
Year
Improving the lifetime of non-volatile cache by write restriction
S Agarwal, HK Kapoor
IEEE Transactions on Computers 68 (9), 1297-1312, 2019
162019
Restricting writes for energy-efficient hybrid cache in multi-core architectures
S Agarwal, HK Kapoor
2016 IFIP/IEEE International Conference on Very Large Scale Integration …, 2016
152016
Reuse-distance-aware write-intensity prediction of dataless entries for energy-efficient hybrid caches
S Agarwal, HK Kapoor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (10 …, 2018
142018
Fault tolerance in network on chip using bypass path establishing packets
S Priya, S Agarwal, HK Kapoor
2018 31st International Conference on VLSI Design and 2018 17th …, 2018
142018
Targeting inter set write variation to improve the lifetime of non-volatile cache using fellow sets
S Agarwal, HK Kapoor
2017 IFIP/IEEE International Conference on Very Large Scale Integration …, 2017
122017
Towards a better lifetime for non-volatile caches in chip multiprocessors
S Agarwal, HK Kapoor
2017 30th International Conference on VLSI Design and 2017 16th …, 2017
112017
Improving the performance of hybrid caches using partitioned victim caching
S Agarwal, HK Kapoor
ACM Transactions on Embedded Computing Systems (TECS) 20 (1), 1-27, 2020
62020
Linovo longevity enhancement of non volatile caches by placement write restriction and victim caching in chip multi processors
S Agarwal
Guwahati, 2020
52020
Reuse distance-based victim cache for effective utilisation of hybrid main memory system
A Nath, S Agarwal, HK Kapoor
ACM Transactions on Design Automation of Electronic Systems (TODAES) 25 (3 …, 2020
42020
ABACa: access based allocation on set wise multi-retention in STT-RAM last level cache
S Agarwal, S Chakraborty
2021 IEEE 32nd international conference on application-specific systems …, 2021
32021
DAMUS: Dynamic Allocation based on Write Frequency in MUlti-Retention STT-RAM based Last Level Caches
M Baranwal, U Chugh, S Dalal, S Agarwal, HK Kapoor
2021 22nd International Symposium on Quality Electronic Design (ISQED), 469-475, 2021
32021
LiNoVo: Longevity enhancement of non-volatile last level caches in chip multiprocessors
S Agarwal, HK Kapoor
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 194-199, 2020
32020
Towards optimizing refresh energy in embedded-DRAM caches using private blocks
SS Manohar, S Agarwal, HK Kapoor
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 225-230, 2019
32019
Lifetime enhancement of non-volatile caches by exploiting dynamic associativity management techniques
S Agarwal, HK Kapoor
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things: 25th …, 2019
32019
Towards a dynamic associativity enabled write prediction based hybrid cache
S Agarwal, HK Kapoor
2016 20th International Symposium on VLSI Design and Test (VDAT), 1-6, 2016
32016
Compound memory models
A Goens, S Chakraborty, S Sarkar, S Agarwal, N Oswald, V Nagarajan
Proceedings of the ACM on Programming Languages 7 (PLDI), 1145-1168, 2023
22023
DELICIOUS: Deadline-aware approximate computing in cache-conscious multicore
S Saha, S Chakraborty, S Agarwal, R Gangopadhyay, M Själander, ...
IEEE Transactions on Parallel and Distributed Systems 34 (2), 718-733, 2022
22022
Enhancing the lifetime of non-volatile caches by exploiting module-wise write restriction
S Agarwal, HK Kapoor
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 213-218, 2019
22019
Towards Analysing the Effect of Hybrid Caches on the Temperature of Tiled Chip Multi-Processors
A Kulkarni, K Rani, S Agarwal, SP Mahajan, HK Kapoor
2018 IEEE International Symposium on Smart Electronic Systems (iSES …, 2018
22018
Non-blocking gated buffers for energy efficient on-chip interconnects in the era of dark silicon
K Rani, S Agarwal, HK Kapoor
2018 8th International Symposium on Embedded Computing and System Design …, 2018
22018
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