| Automatic C compiler generation from architecture description language ISAC A Husár, M Trmac, J Hranac, T Hruska, K Masarik Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer …, 2011 | 21 | 2011 |
| Morphological principles of neuronal mitochondria R Mendelsohn, GC Garcia, TM Bartol, CT Lee, P Khandelwal, E Liu, ... Journal of Comparative Neurology 530 (6), 886-902, 2022 | 19 | 2022 |
| Fast cycle-accurate interpreted simulation Z Prikryl, K Masarík, T Hruška, A Husár 2009 10th International Workshop on Microprocessor Test and Verification, 9-14, 2009 | 14 | 2009 |
| Method and an apparatus for automatic processor design and verification A Husár, K Masa US Patent 9,235,669, 2016 | 8 | 2016 |
| Fast cycle-accurate compiled simulation Z Přikryl, T Hruška, K Masařík, A Husár IFAC Proceedings Volumes 43 (24), 76-81, 2010 | 8 | 2010 |
| Generated cycle-accurate profiler for C language Z Pr̆ikryl, K Masar̆ík, T Hruśka, A Husár 2010 13th Euromicro Conference on Digital System Design: Architectures …, 2010 | 7 | 2010 |
| Mcell4 with bionetgen: A Monte Carlo simulator of rule-based reaction-diffusion systems with python interface A Husar, M Ordyan, GC Garcia, JG Yancey, AS Saglam, JR Faeder, ... PLOS Computational Biology 20 (4), e1011800, 2024 | 4 | 2024 |
| Design and simulation of high performance parallel architectures using the ISAC language Z Přikryl, J Křoustek, T Hruška, D Kolář, K Masařík, A Husár GSTF Journal on Computing (JoC) 1 (2), 2014 | 4 | 2014 |
| Design and de-bugging of parallel architectures using the ISAC language Z Přikryl, J Křoustek, T Hruška, D Kolář, K Masařík, A Husár Annual International Conference on Advanced Distributed and Parallel …, 2010 | 3 | 2010 |
| Implementace obecného assembleru A Husár, INGT HRUŠKA Semestrální projekt, FIT VUT, 2007 | 3 | 2007 |
| Instructor selector generation from architecture description M Trmac, A Husár, J Hranac, T Hruska, K Masarik Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer …, 2011 | 2 | 2011 |
| Method and an apparatus for automatic processor design and verification Z Prikryl, A Husár, K Masarík, T Hruska US Patent App. 14/183,482, 2015 | 1 | 2015 |
| Method and an apparaus for instruction set translation using finite state automata T Hruska, Z Prikryl, A Husar US Patent App. 14/103,845, 2015 | | 2015 |
| Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'10)--Selected Papers L Matyska, M Kozubek, T Vojnar, P Zemcik, D Antos, P Bauch, M Ceska, ... Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik, 2011 | | 2011 |
| Digital signal soft-processor for audio and video processing M Přístach, A Husár, L Fujčík, T Hruška, K Masařík Západočeská univerzita v Plzni, Fakulta elektrotechnická, 2011 | | 2011 |
| INSTRUCTION SELECTION PATTERNS EXTRACTION FROM ARCHITECTURE DESCRIPTION LANGUAGE ISAC A Husár, M Trmac, Z Prikryl | | |
| ASIP Design in the Lissom Project Z Přikryl, A Husár, T Hruška, K Masařík | | |
