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Vojtech Rehak
Vojtech Rehak
Masaryk university, Faculty of Informatics
E-mailová adresa ověřena na: fi.muni.cz
Název
Citace
Citace
Rok
LTL to Büchi Automata Translation: Fast and More Deterministic
T Babiak, M Křetínský, V Řehák, J Strejček
TACAS 2012: 18th International Conference on Tools and Algorithms for the …, 2012
1712012
Extended process rewrite systems: Expressiveness and reachability
M Křetínský, V Řehák, J Strejček
CONCUR 2004-Concurrency Theory, 355-370, 2004
292004
Verification of open interactive Markov chains
T Brázdil, H Hermanns, J Krcál, J Kretinsky, V Rehák
FSTTSC 2012 18, 2012
242012
Stochastic real-time games with qualitative timed automata objectives
T Brázdil, J Krčál, J Křetínský, A Kučera, V Řehák
CONCUR 2010-Concurrency Theory, 207-221, 2011
242011
Fixed-delay Events in Generalized Semi-Markov Processes Revisited
T Brázdil, J Krčál, J Křetínský, V Řehák
CONCUR 2011-Concurrency Theory: 22nd International Conference, 140-155, 2011
202011
Optimizing performance of continuous-time stochastic systems using timeout synthesis
T Brázdil, Ľ Korenčiak, J Krčál, P Novotný, V Řehák
International Conference on Quantitative Evaluation of Systems, 141-159, 2015
182015
On decidability of LTL model checking for process rewrite systems
L Bozzelli, M Křetínský, V Řehák, J Strejček
Acta informatica 46, 1-28, 2009
162009
Verification results in Liberouter project
J Holeček, T Kratochvíla, V Řehák, D Šafránek, P Šimeček
Technical Report 03, 2004
142004
Reachability of Hennessy-Milner properties for weakly extended PRS
M Křetínský, V Řehák, J Strejček
FSTTCS 2005: Foundations of Software Technology and Theoretical Computer …, 2005
132005
On extensions of process rewrite systems: Rewrite systems with weak finite-state unit
M Křetı́nský, V Rehák, J Strejček
Electronic Notes in Theoretical Computer Science 98, 75-88, 2004
132004
Model checking in IPv6 Hardware Router Design
J Barnat, T Brázdil, P Krčál, V Řehák, D Šafránek
CESNET technical report 8, 2002
132002
Solving adversarial patrolling games with bounded error
M Abaffy, T Brázdil, V Řehák, B Bošanský, A Kučera, J Krčál
Proceedings of the 2014 international conference on Autonomous agents and …, 2014
122014
Hardware Router’s Lookup Machine and its Formal Verification
D Antoš, V Řehák, J Kořenek
ICN’2004 Conference Proceedings 2, 2004
122004
Verification of COMBO6 VHDL Design
T Kratochvíla, V Řehák, P Šimeček
Technical report, 2003
122003
Automatic synthesis of efficient regular strategies in adversarial patrolling games
D Klaška, A Kučera, T Lamser, V Řehák
Proceedings of the 17th International Conference on Autonomous Agents and …, 2018
112018
Solving patrolling problems in the internet environment
T Brázdil, A Kučera, V Řehák
Proceedings of the 27th International Joint Conference on Artificial …, 2018
102018
Dealing with zero density using piecewise phase-type approximation
L Korenčiak, J Krčál, V Řehák
European Workshop on Performance Engineering, 119-134, 2014
102014
Measuring performance of continuous-time stochastic processes using timed automata
T Brázdil, J Krcál, J Kretínský, A Kucera, V Řehák
Proceedings of the 14th international conference on Hybrid systems …, 2011
102011
Adversarial patrolling with drones
D Klaška, A Kučera, V Řehák
Proceedings of the 19th International Conference on Autonomous Agents and …, 2020
82020
Synthesis of optimal resilient control strategies
C Baier, C Dubslaff, L Korenčiak, A Kučera, V Řehák
International Symposium on Automated Technology for Verification and …, 2017
82017
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Články 1–20