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Bahareh Khabbazan
Bahareh Khabbazan
PhD Researcher in Polytechnic University of Catalonia, Barcelona Tech (UPC)
Verified email at upc.edu
Title
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Cited by
Year
Design and implementation of a low-power, embedded cnn accelerator on a low-end fpga
B Khabbazan, S Mirzakuchaki
2019 22nd Euromicro Conference on Digital System Design (DSD), 647-650, 2019
282019
A framework for modeling, optimizing, and implementing dnns on fpga using hls
M Shahshahani, B Khabbazan, M Sabri, D Bhatia
2020 IEEE 14th Dallas Circuits and Systems Conference (DCAS), 1-6, 2020
92020
Area and power-efficient variable-sized DCT architecture for HEVC using Muxed-MCM problem
A Shabani, M Sabri, B Khabbazan, S Timarchi
IEEE Transactions on Circuits and Systems I: Regular Papers 68 (3), 1259-1268, 2020
82020
An automated tool for implementing deep neural networks on fpga
M Shahshahani, M Sabri, B Khabbazan, D Bhatia
2021 34th International Conference on VLSI Design and 2021 20th …, 2021
62021
An Energy-Efficient Near-Data Processing Accelerator for DNNs that Optimizes Data Accesses
B Khabbazan, M Riera, A González
arXiv preprint arXiv:2310.18181, 2023
2023
QeiHaN: An Energy-Efficient DNN Accelerator that Leverages Log Quantization in NDP Architectures
B Khabbazan, M Riera, A González
2023 32nd International Conference on Parallel Architectures and Compilation …, 2023
2023
DNA-TEQ: An Adaptive Exponential Quantization of Tensors for DNN Inference
B Khabbazan, M Riera, A González
arXiv preprint arXiv:2306.16430, 2023
2023
Liang, Shuhao 297
P Abad, ME Acacio, A Agrawal, GG Akbulut, E Aliaj, M Almasri, J An, ...
2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID)| 978-1-6654-4087-5/21/$31.00© 2021 IEEE| DOI: 10.1109 …
Z Abbas, I Afanasyev, A Agrawal, S Agrawal, V Agrawal, I Alouani, ...
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